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  • Dependability parameters of FPGA chips, specially the SRAM-based ones, are still not so high, especially when using them in mission-critical applications. To prove or disprove this statement, we decide to make some experiments with real FPGA chips under extreme conditions and find out what really happens with the circuit when a single event upset occurs. This paper describes these experiments and their obtained and expected results.
  • Dependability parameters of FPGA chips, specially the SRAM-based ones, are still not so high, especially when using them in mission-critical applications. To prove or disprove this statement, we decide to make some experiments with real FPGA chips under extreme conditions and find out what really happens with the circuit when a single event upset occurs. This paper describes these experiments and their obtained and expected results. (en)
Title
  • Physical Injection of Errors Into the FPGA
  • Physical Injection of Errors Into the FPGA (en)
skos:prefLabel
  • Physical Injection of Errors Into the FPGA
  • Physical Injection of Errors Into the FPGA (en)
skos:notation
  • RIV/68407700:21240/11:00182676!RIV12-MSM-21240___
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  • P(GA102/09/1668), S, Z(MSM6840770014)
http://linked.open...vai/riv/dodaniDat
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  • 220346
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  • RIV/68407700:21240/11:00182676
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  • single event upset (SEU); programmable hardware; FPGA; radiation; circuit testing; dependability (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [1141E27B8D74]
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  • Stará Lesná
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  • Bratislava
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  • Počítačové architektury & diagnostika
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  • Vaňát, Tomáš
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number of pages
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  • Slovenská technická univerzita v Bratislave
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  • 978-80-227-3552-0
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  • 21240
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