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  • Dependability parameters of FPGA chips, specially the SRAM-based ones, are still not so high, especially when using them in mission-critical applications. To prove or disprove this statement, we decide to make some experiments with real FPGA chips under extreme conditions and find out what really happens with the circuit when a single event upset occurs. This paper describes these experiments and their obtained and expected results.
  • Dependability parameters of FPGA chips, specially the SRAM-based ones, are still not so high, especially when using them in mission-critical applications. To prove or disprove this statement, we decide to make some experiments with real FPGA chips under extreme conditions and find out what really happens with the circuit when a single event upset occurs. This paper describes these experiments and their obtained and expected results. (en)
Title
  • Experiments with Physical Error Injection into FPGA Circuits
  • Experiments with Physical Error Injection into FPGA Circuits (en)
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  • Experiments with Physical Error Injection into FPGA Circuits
  • Experiments with Physical Error Injection into FPGA Circuits (en)
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  • RIV/68407700:21240/11:00182675!RIV12-MSM-21240___
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  • P(GA102/09/1668), S, Z(MSM6840770014)
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  • 198932
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  • RIV/68407700:21240/11:00182675
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  • single event upset (SEU); programmable hardware; FPGA; radiation; circuit testing; dependability (en)
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  • [C8976AB0502A]
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  • Oulu
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  • Oulu
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  • Proceedings of the Work in Progress Session - DSD 2011
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  • Kubátová, Hana
  • Vaňát, Tomáš
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number of pages
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  • University of Oulu
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  • 978-3-902457-30-1
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  • 21240
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