About: Techniques for SAT-Based Constrained Test Pattern Generation

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Testing of digital circuits seems to be a completely mastered part of the design flow, but constrained test patterns generation is still a highly evolving branch of digital circuit testing. Our previous research on constrained test pattern generation proved that we can benefit from an implicit representation of test patterns set in CNF (Conjunctive Normal Form). Some techniques of speeding up the constrained SATbased test patterns generation are described and closely analyzed in this paper. These techniques are experimentally evaluated on a real SAT-based algorithm performing a constrained test patterns compression based on overlapping of test patterns. Experiments are performed on a subset of ISCAS'85 and '89 benchmark circuits. Results of the experiments are discussed and recommendations for a further development of similar SAT-based tools for constrained test patterns generation are given. Testing of digital circuits seems to be a completely mastered part of the design flow, but constrained test patterns generation is still a highly evolving branch of digital circuit testing. Our previous research on constrained test pattern generation proved that we can benefit from an implicit representation of test patterns set in CNF (Conjunctive Normal Form). Some techniques of speeding up the constrained SATbased test patterns generation are described and closely analyzed in this paper. These techniques are experimentally evaluated on a real SAT-based algorithm performing a constrained test patterns compression based on overlapping of test patterns. Experiments are performed on a subset of ISCAS'85 and '89 benchmark circuits. Results of the experiments are discussed and recommendations for a further development of similar SAT-based tools for constrained test patterns generation are given. (en)
Title	Techniques for SAT-Based Constrained Test Pattern Generation Techniques for SAT-Based Constrained Test Pattern Generation (en)
skos:prefLabel	Techniques for SAT-Based Constrained Test Pattern Generation Techniques for SAT-Based Constrained Test Pattern Generation (en)
skos:notation	RIV/68407700:21240/11:00182466!RIV12-MSM-21240___
http://linked.open...avai/predkladatel	Fakulta informačních technologií
http://linked.open...avai/riv/aktivita	P S Z
http://linked.open...avai/riv/aktivity	P(GA102/09/1668), S, Z(MSM6840770014)
http://linked.open...vai/riv/dodaniDat	2012
http://linked.open...aciTvurceVysledku	Fišer, Petr Schmidt, Jan Balcárek, Jiří
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	234356
http://linked.open...ai/riv/idVysledku	RIV/68407700:21240/11:00182466
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	implicit representation; SAT; ATPG; constrained test (en)
http://linked.open.../riv/klicoveSlovo	SAT ATPG constrained test implicit representation
http://linked.open...ontrolniKodProRIV	[F898E2386C47]
http://linked.open...v/mistoKonaniAkce	Oulu
http://linked.open...i/riv/mistoVydani	Los Alamitos
http://linked.open...i/riv/nazevZdroje	Proceedings of the 14th Euromicro Conference on Digital System Design
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	3 (xsd:int)
http://linked.open...cetTvurcuVysledku	3 (xsd:int)
http://linked.open...vavai/riv/projekt	SoC circuits reliability and availability improvement
http://linked.open...UplatneniVysledku	2011
http://linked.open...iv/tvurceVysledku	Balcárek, Jiří Fišer, Petr Schmidt, Jan
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2011-08-31 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Výzkum perspektivních informačních a komunikačních technologií
number of pages	7 (xsd:int)
http://bibframe.org/vocab/doi	10.1109/DSD.2011.50
http://purl.org/ne...btex#hasPublisher	IEEE Computer Society Press
https://schema.org/isbn	978-0-7695-4494-6
http://localhost/t...ganizacniJednotka	21240
is http://linked.open...avai/riv/vysledek of	Techniques for SAT-Based Constrained Test Pattern Generation Techniques for SAT-Based Constrained Test Pattern Generation

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