About: Implicit Rrepresentations in Customized Testing of Digital Circuits

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Despite of the growing number of analog and mixed signal parts in electronic devices, there are still many challenges in digital circuits testing. Many test patterns generation and compression methods for digital circuits have been developed, but their efficiency can dramatically depend on the representation of test vectors sets. Also the importance of additional requirements imposed upon a test set increases. In this paper we consider implicit representations of test patterns sets and possibilities of their use in test patterns generation, compression and constrained test generation. We suppose that by using a proper implicit representation and a set of possible constraints, a significant improvement in customized test generation is possible. Despite of the growing number of analog and mixed signal parts in electronic devices, there are still many challenges in digital circuits testing. Many test patterns generation and compression methods for digital circuits have been developed, but their efficiency can dramatically depend on the representation of test vectors sets. Also the importance of additional requirements imposed upon a test set increases. In this paper we consider implicit representations of test patterns sets and possibilities of their use in test patterns generation, compression and constrained test generation. We suppose that by using a proper implicit representation and a set of possible constraints, a significant improvement in customized test generation is possible. (en)
Title	Implicit Rrepresentations in Customized Testing of Digital Circuits Implicit Rrepresentations in Customized Testing of Digital Circuits (en)
skos:prefLabel	Implicit Rrepresentations in Customized Testing of Digital Circuits Implicit Rrepresentations in Customized Testing of Digital Circuits (en)
skos:notation	RIV/68407700:21240/10:00170151!RIV11-GA0-21240___
http://linked.open...avai/riv/aktivita	P S Z
http://linked.open...avai/riv/aktivity	P(GA102/09/1668), S, Z(MSM6840770014)
http://linked.open...vai/riv/dodaniDat	2011
http://linked.open...aciTvurceVysledku	Balcárek, Jiří
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	263127
http://linked.open...ai/riv/idVysledku	RIV/68407700:21240/10:00170151
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	Implicit test representation, testing, test compression (en)
http://linked.open.../riv/klicoveSlovo	test compression testing Implicit test representation
http://linked.open...ontrolniKodProRIV	[CCDEEEEE9629]
http://linked.open...v/mistoKonaniAkce	Češkovice
http://linked.open...i/riv/mistoVydani	Brno
http://linked.open...i/riv/nazevZdroje	Počítačové architektury & diagnostika
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	1 (xsd:int)
http://linked.open...cetTvurcuVysledku	1 (xsd:int)
http://linked.open...vavai/riv/projekt	SoC circuits reliability and availability improvement
http://linked.open...UplatneniVysledku	2010
http://linked.open...iv/tvurceVysledku	Balcárek, Jiří
http://linked.open...vavai/riv/typAkce	CST - Celostátní
http://linked.open.../riv/zahajeniAkce	2010-09-13 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Výzkum perspektivních informačních a komunikačních technologií
number of pages	6 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Vysoké učení technické v Brně
https://schema.org/isbn	978-80-214-4140-8
http://localhost/t...ganizacniJednotka	21240
is http://linked.open...avai/riv/vysledek of	Implicit Rrepresentations in Customized Testing of Digital Circuits

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