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Description
  • Runtime reconfigurable systems become more prevalent in numerous practical applications because these systems have a great flexibility. This paper presents a reconfigurable system implemented on Xilinx Field Programmable Gate Array (FPGA) where partial bitstream relocation (PBR), configuration memory readback and internal registers restoration techniques are supported. It can reduce a number of partial bitstreams stored in memory, save the implementation time and generally increase the flexibility of the reconfigurable system. The article describes a relocatable system creation where the relocation procedure is based on the bitstream major address modifications and design where the relocation of individual modules including their internal states is supported.
  • Runtime reconfigurable systems become more prevalent in numerous practical applications because these systems have a great flexibility. This paper presents a reconfigurable system implemented on Xilinx Field Programmable Gate Array (FPGA) where partial bitstream relocation (PBR), configuration memory readback and internal registers restoration techniques are supported. It can reduce a number of partial bitstreams stored in memory, save the implementation time and generally increase the flexibility of the reconfigurable system. The article describes a relocatable system creation where the relocation procedure is based on the bitstream major address modifications and design where the relocation of individual modules including their internal states is supported. (en)
Title
  • A highly flexible reconfigurable system on a Xilinx FPGA
  • A highly flexible reconfigurable system on a Xilinx FPGA (en)
skos:prefLabel
  • A highly flexible reconfigurable system on a Xilinx FPGA
  • A highly flexible reconfigurable system on a Xilinx FPGA (en)
skos:notation
  • RIV/46747885:24220/14:#0003127!RIV15-MSM-24220___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(LD13019), S
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
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http://linked.open...iv/duvernostUdaju
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  • 769
http://linked.open...ai/riv/idVysledku
  • RIV/46747885:24220/14:#0003127
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • FPGA reconfigurable systems (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [7B0463C268B5]
http://linked.open...v/mistoKonaniAkce
  • Cancun; Mexico
http://linked.open...i/riv/mistoVydani
  • Cancun; Mexico
http://linked.open...i/riv/nazevZdroje
  • 2014 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2014
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
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http://linked.open...UplatneniVysledku
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  • Novák, Ondřej
  • Rozkovec, Martin
  • Drahoňovský, Tomáš
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
number of pages
http://bibframe.org/vocab/doi
  • 10.1109/ReConFig.2014.7032531
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  • Institute of Electrical and Electronics Engineers Inc.
https://schema.org/isbn
  • 978-1-4799-5943-3
http://localhost/t...ganizacniJednotka
  • 24220
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