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  • The paper deals with the design and optimization of blind oversampling clock and data recovery (CDR) based on FPGA prototyping. The main advantage of the oversampling CDR is the fully digital architecture, which enables the FPGA-based testing and its subsequent integration into any ASIC technology. The oversampling CDR is a promising block for free space optical (FSO) applications because of its extremely short reacquisition time, which is the key feature for efficient communication over the frequently fading channel. An efficient statistical simulation model for the CDR optimization is presented. Our effort in optimization was focused mainly on the simplification of the decision algorithm while maintaining acceptable jitter tolerance. The suggested method was verified on the Xilinx FPGA platform.
  • The paper deals with the design and optimization of blind oversampling clock and data recovery (CDR) based on FPGA prototyping. The main advantage of the oversampling CDR is the fully digital architecture, which enables the FPGA-based testing and its subsequent integration into any ASIC technology. The oversampling CDR is a promising block for free space optical (FSO) applications because of its extremely short reacquisition time, which is the key feature for efficient communication over the frequently fading channel. An efficient statistical simulation model for the CDR optimization is presented. Our effort in optimization was focused mainly on the simplification of the decision algorithm while maintaining acceptable jitter tolerance. The suggested method was verified on the Xilinx FPGA platform. (en)
  • The paper deals with the design and optimization of blind oversampling clock and data recovery (CDR) based on FPGA prototyping. The main advantage of the oversampling CDR is the fully digital architecture, which enables the FPGA-based testing and its subsequent integration into any ASIC technology. The oversampling CDR is a promising block for free space optical (FSO) applications because of its extremely short reacquisition time, which is the key feature for efficient communication over the frequently fading channel. An efficient statistical simulation model for the CDR optimization is presented. Our effort in optimization was focused mainly on the simplification of the decision algorithm while maintaining acceptable jitter tolerance. The suggested method was verified on the Xilinx FPGA platform. (cs)
Title
  • Optimization of oversampling Data Recovery
  • Optimization of oversampling Data Recovery (en)
  • Optimization of oversampling Data Recovery (cs)
skos:prefLabel
  • Optimization of oversampling Data Recovery
  • Optimization of oversampling Data Recovery (en)
  • Optimization of oversampling Data Recovery (cs)
skos:notation
  • RIV/00216305:26220/09:PU82205!RIV11-MSM-26220___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(2C06012), P(GA102/08/0784), P(GA102/08/0851), P(GD102/08/H027), P(OC08027), Z(MO0FVT0000403), Z(MSM0021630513)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 332017
http://linked.open...ai/riv/idVysledku
  • RIV/00216305:26220/09:PU82205
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • application specific integrated circuits, fading channels, field programmable gate arrays, optical links, sampling methods, synchronisation (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [4CEBDE7FAAC6]
http://linked.open...v/mistoKonaniAkce
  • Cancun, Mexico
http://linked.open...i/riv/mistoVydani
  • Mexico
http://linked.open...i/riv/nazevZdroje
  • Circuits and Systems, 2009. MWSCAS '09. 52nd IEEE International Midwest Symposium on
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Biolek, Dalibor
  • Biolková, Viera
  • Kolka, Zdeněk
  • Kubíček, Michal
http://linked.open...vavai/riv/typAkce
http://linked.open...ain/vavai/riv/wos
  • 000277574000114
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • IEEE
https://schema.org/isbn
  • 978-1-4244-4479-3
http://localhost/t...ganizacniJednotka
  • 26220
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