About: Device for Precise Packet Delay Measurement

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Node synchronization can be implemented in an Ethernet network using time protocols; e.g. IEEE 1588. Active network components like switches and routers influence a precision of the synchronization because they affect the packet delay in the network. Therefore, the delay is not constant and also the delay in one direction is not equal to the delay in the opposite direction. This paper presents a low-cost device that can precisely measure the packet delay in both communication directions and, at the same time, calculate network parameters; e.g. the packet delay variation, the path asymmetry and dependency of the delay in opposite directions. Measured values can be used to determine the usability of the network for the IEEE 1588 implementation and to predict the quality of the synchronization in a network. These measurements are important to achieve a precise synchronization in a low-cost network infrastructure. Node synchronization can be implemented in an Ethernet network using time protocols; e.g. IEEE 1588. Active network components like switches and routers influence a precision of the synchronization because they affect the packet delay in the network. Therefore, the delay is not constant and also the delay in one direction is not equal to the delay in the opposite direction. This paper presents a low-cost device that can precisely measure the packet delay in both communication directions and, at the same time, calculate network parameters; e.g. the packet delay variation, the path asymmetry and dependency of the delay in opposite directions. Measured values can be used to determine the usability of the network for the IEEE 1588 implementation and to predict the quality of the synchronization in a network. These measurements are important to achieve a precise synchronization in a low-cost network infrastructure. (en)
Title	Device for Precise Packet Delay Measurement Device for Precise Packet Delay Measurement (en)
skos:prefLabel	Device for Precise Packet Delay Measurement Device for Precise Packet Delay Measurement (en)
skos:notation	RIV/68407700:21230/13:00205824!RIV14-TA0-21230___
http://linked.open...avai/predkladatel	Fakulta elektrotechnická
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(TA01010988)
http://linked.open...vai/riv/dodaniDat	2014
http://linked.open...aciTvurceVysledku	Roztočil, Jaroslav Vigner, Vojtěch Breuer, Jan
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta elektrotechnická
http://linked.open...dnocenehoVysledku	69246
http://linked.open...ai/riv/idVysledku	RIV/68407700:21230/13:00205824
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	IEEE 1588; Packet delay (en)
http://linked.open.../riv/klicoveSlovo	IEEE 1588 Packet delay
http://linked.open...ontrolniKodProRIV	[B75DB7A5A5B5]
http://linked.open...v/mistoKonaniAkce	Florencie
http://linked.open...i/riv/mistoVydani	Florencie
http://linked.open...i/riv/nazevZdroje	Proceedings of the 12th IMEKO TC10 Workshop on Technical Diagnostics
http://linked.open...in/vavai/riv/obor	JB
http://linked.open...ichTvurcuVysledku	3 (xsd:int)
http://linked.open...cetTvurcuVysledku	3 (xsd:int)
http://linked.open...vavai/riv/projekt	Timing synchronous distributed systems for data acquisition and process control
http://linked.open...UplatneniVysledku	2013
http://linked.open...iv/tvurceVysledku	Roztočil, Jaroslav Vigner, Vojtěch Breuer, Jan
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2013-06-06 (xsd:date)
number of pages	6 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Universita di Firenze
https://schema.org/isbn	978-88-903149-8-8
http://localhost/t...ganizacniJednotka	21230

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