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Description
  • This demonstration shows an early prototype of low-level image processing to be used in an embedded smart camera, that is foreground detection and image segmentation. The example uses camera with resolution 640x480 pixels for input images processed at 100MHz in the FPGA. The input can be easily extended to higher resolutions. The processed output is displayed on LCD screen.
  • This demonstration shows an early prototype of low-level image processing to be used in an embedded smart camera, that is foreground detection and image segmentation. The example uses camera with resolution 640x480 pixels for input images processed at 100MHz in the FPGA. The input can be easily extended to higher resolutions. The processed output is displayed on LCD screen. (en)
Title
  • Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs
  • Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs (en)
skos:prefLabel
  • Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs
  • Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs (en)
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  • RIV/67985556:_____/12:00382187!RIV13-MSM-67985556
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  • I, P(7H10001)
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  • 136945
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  • RIV/67985556:_____/12:00382187
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  • video surveillance; smart camera; custom accelerators; vector processing; FPGA (en)
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  • [EFE84663F153]
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  • Karlsruhe
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  • Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing
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  • Daněk, Martin
  • Kohout, Lukáš
  • Sýkora, Jaroslav
  • Honzík, P.
  • Bartosinski, Roman
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number of pages
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  • Electronic Chips & Systems design Initiative
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  • 978-2-9539987-2-6
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