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  • The fundamental aspect behind this paper is focused on behaviour of polymorphic digital circuits in potentially harsh operating environment. Unlike conventional CMOS-based circuits, the area of polymorphic electronics takes and an advantage of inherently built-in features that open up the possibility for on-the-fly adjustment of a particular circuit function with respect to the surrounding environment. The most prevalent benefit here is connected with the fact that space-efficient circuit implementation can be achieved due to the adoption of polymorphic principles and, thus, eliminate the need for an additional function change controller. From a conceptual point of view, key attention is given to a set of experiments which were conducted with the aim to evaluate the influence of wide temperature range (with special interest in low temperatures domain) in case of reconfigurable chip with dedicated polymorphic gates. The experimental setup was based around reconfigurable polymorphic chip REP
  • The fundamental aspect behind this paper is focused on behaviour of polymorphic digital circuits in potentially harsh operating environment. Unlike conventional CMOS-based circuits, the area of polymorphic electronics takes and an advantage of inherently built-in features that open up the possibility for on-the-fly adjustment of a particular circuit function with respect to the surrounding environment. The most prevalent benefit here is connected with the fact that space-efficient circuit implementation can be achieved due to the adoption of polymorphic principles and, thus, eliminate the need for an additional function change controller. From a conceptual point of view, key attention is given to a set of experiments which were conducted with the aim to evaluate the influence of wide temperature range (with special interest in low temperatures domain) in case of reconfigurable chip with dedicated polymorphic gates. The experimental setup was based around reconfigurable polymorphic chip REP (en)
Title
  • NAND/NOR Gate Polymorphism in Low Temperature Environment
  • NAND/NOR Gate Polymorphism in Low Temperature Environment (en)
skos:prefLabel
  • NAND/NOR Gate Polymorphism in Low Temperature Environment
  • NAND/NOR Gate Polymorphism in Low Temperature Environment (en)
skos:notation
  • RIV/00216305:26230/12:PU98219!RIV13-GA0-26230___
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  • P(ED1.1.00/02.0070), P(GAP103/10/1517), S, Z(MSM0021630528)
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  • 152895
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  • RIV/00216305:26230/12:PU98219
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  • Polymorphic electronics, temperature-awareness, polymorphic gate, multifunctional gate (en)
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  • [47A520913A99]
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  • Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems
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  • Růžička, Richard
  • Šimek, Václav
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number of pages
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  • Institute of Electrical and Electronics Engineers
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  • 978-1-4673-1185-4
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  • 26230
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