. "[02EA84A106E2]" . . . "Advanced BGSOI Technology"@en . "Advanced BGSOI Technology - Bond and Grind Back Silicon-On-Insulator \u2013 is based on manufacturing flow including: 1) Manufacturing of polished silicon wafers for SOI, 2) Thermal oxidation of wafers for BOX (Buried Oxide), 3) Wafers bonding and bonded pairs annealing, 4) Device layer grinding and grinding of the edge of SOI wafer. 5) Grinding and polishing of SOI wafer, 6) Cleaning of SOI wafers and SOI wafers metrology. This technology produces polished SOI wafers with diameters of 150 and 200 mm, with BOX thickness of 100 \u2013 2000 nm and device layer thickness of 2 \u2013 120 um."@en . . "Pokro\u010Dil\u00E1 BGSOI technologie" . "Pokro\u010Dil\u00E1 BGSOI technologie - Bond and Grind Back Silicon-On-Insulator \u2013 je zalo\u017Eena na v\u00FDrobn\u00EDm flow zahrnuj\u00EDc\u00EDm: 1) v\u00FDrobu le\u0161t\u011Bn\u00FDch k\u0159em\u00EDkov\u00FDch desek pro SOI, 2) oxidaci desek pro BOX (Buried Oxide), 3) Bonding k\u0159em\u00EDkov\u00FDch desek a \u017E\u00EDh\u00E1n\u00ED bondovan\u00E9ho p\u00E1ru, 4) Brou\u0161en\u00ED aktivn\u00ED vrstvy a brou\u0161en\u00ED okraje SOI desky, 5) Brou\u0161en\u00ED a le\u0161t\u011Bn\u00ED SOI desky, 6) \u010Ci\u0161t\u011Bn\u00ED SOI desek a m\u011B\u0159en\u00ED parametr\u016F SOI desek. Technologie umo\u017E\u0148uje v\u00FDrobu le\u0161t\u011Bn\u00FDch SOI desek v pr\u016Fm\u011Brech 150 a 200 mm, s tlou\u0161\u0165kou BOX 100 \u2013 2000 nm, s tlou\u0161\u0165kou aktivn\u00ED oblasti 2 \u2013 120 um."@cs . . . . "Advanced BGSOI Technology"@en . . . "V\u00E1lek, Luk\u00E1\u0161" . "P(TA01010078)" . "Pokro\u010Dil\u00E1 BGSOI technologie"@cs . . "\u0160ik, Jan" . . "4"^^ . . "4"^^ . "RIV/26821532:_____/13:#0000066!RIV14-TA0-26821532" . . . . . "BGSOI-CZ2-ZKZ12/59" . . "Lorenc, Michal" . "JEDNOTKOV\u00C1 CENA 60 USD/STANDARDN\u00CD BGSOI DESKA (PR\u016EM\u011AR 150 mm), o\u010Dek\u00E1van\u00FD ro\u010Dn\u00ED objem v\u00FDroby min. 5 tis. Desek." . . "DEVICE LAYER 2-120 um, RADI\u00C1LN\u00CD VARIABILITA +/-0.5um, BOX 100-2000 nm, WAFER DIAMETER 150 a 200 mm, SPECIFIKACE LE\u0160T\u011AN\u011A DESKY PRO POLOVODODI\u010COV\u011A APLIKACE. V\u00FDsledek bude vyu\u017Eit p\u0159\u00EDjemcem - ON SEMICONDUCTOR (I\u010C26821532) ve v\u00FDrobn\u00ED lince CZ2. Licen\u010Dn\u00ED smlouva nebyla uzav\u0159ena. Odpov\u011Bdnost: M. Lorenc, +420571754507, michal.lorenc@onsemi.com." . . . "Posp\u00ED\u0161il, Milo\u0161" . . "Silicon, Silicon-On-Insulator, SOI, BGSOI, Polishing, Grinding, Semiconductor"@en . . . "Pokro\u010Dil\u00E1 BGSOI technologie" . . "96883" . . "RIV/26821532:_____/13:#0000066" . . . "Pokro\u010Dil\u00E1 BGSOI technologie - Bond and Grind Back Silicon-On-Insulator \u2013 je zalo\u017Eena na v\u00FDrobn\u00EDm flow zahrnuj\u00EDc\u00EDm: 1) v\u00FDrobu le\u0161t\u011Bn\u00FDch k\u0159em\u00EDkov\u00FDch desek pro SOI, 2) oxidaci desek pro BOX (Buried Oxide), 3) Bonding k\u0159em\u00EDkov\u00FDch desek a \u017E\u00EDh\u00E1n\u00ED bondovan\u00E9ho p\u00E1ru, 4) Brou\u0161en\u00ED aktivn\u00ED vrstvy a brou\u0161en\u00ED okraje SOI desky, 5) Brou\u0161en\u00ED a le\u0161t\u011Bn\u00ED SOI desky, 6) \u010Ci\u0161t\u011Bn\u00ED SOI desek a m\u011B\u0159en\u00ED parametr\u016F SOI desek. Technologie umo\u017E\u0148uje v\u00FDrobu le\u0161t\u011Bn\u00FDch SOI desek v pr\u016Fm\u011Brech 150 a 200 mm, s tlou\u0161\u0165kou BOX 100 \u2013 2000 nm, s tlou\u0161\u0165kou aktivn\u00ED oblasti 2 \u2013 120 um." . "Pokro\u010Dil\u00E1 BGSOI technologie"@cs .