"194"^^ . "1"^^ . . "978-3-89966-351-8" . "[0CB41F4783AA]" . "1"^^ . . . . "RIV/68407700:21240/10:00167731" . "Time-Area Efficient HW Architectures for Cryptography and Cryptanalysis" . "21240" . . "194"^^ . . . . "Europ\u00E4ischer Universit\u00E4tsverlag" . "Time-Area Efficient HW Architectures for Cryptography and Cryptanalysis"@en . . "The first part of the book focuses on hardware architectures operating over elements of GF(2^m) in normal basis representation. Such architectures are applicable e.g. in Elliptic Curve Cryptography. Four new architectures of digit-serial normal basis multipliers are presented. Based on these architectures, a novel structure of a normal basis arithmetic unit is proposed. As the unit is both small and scalable, the design constrains can be met optimally. The second part of the thesis focuses on the cryptanalysis of the A5/1 cipher used in GSM communications. Hardware architectures of two attacks against the A5/1 cipher are presented. The attacks have been implemented using an existing low-cost special-purpose hardware device: COPACOBANA. The attacks are designed to utilize both the properties of the cipher and the features of underlying reconfigurable hardware. Presented design approaches can be reused when designing attacks against similar ciphers."@en . . . . "292920" . . "Time-Area Efficient HW Architectures for Cryptography and Cryptanalysis" . "Novotn\u00FD, Martin" . "Time-Area Efficient HW Architectures for Cryptography and Cryptanalysis"@en . "N" . "Bochum" . . . "IT Security \u010D. sv. 12" . . . . "Public Key Cryptography; Elliptic Curve Cryptography; Arithmetic Unit; Binary Finite Fields GF(2^m); Normal Basis; Multiplication; Inversion; Cryptanalysis; Brute-Force Attack; TMDTO Attack; A5/1; COPACOBANA; FPGA"@en . "The first part of the book focuses on hardware architectures operating over elements of GF(2^m) in normal basis representation. Such architectures are applicable e.g. in Elliptic Curve Cryptography. Four new architectures of digit-serial normal basis multipliers are presented. Based on these architectures, a novel structure of a normal basis arithmetic unit is proposed. As the unit is both small and scalable, the design constrains can be met optimally. The second part of the thesis focuses on the cryptanalysis of the A5/1 cipher used in GSM communications. Hardware architectures of two attacks against the A5/1 cipher are presented. The attacks have been implemented using an existing low-cost special-purpose hardware device: COPACOBANA. The attacks are designed to utilize both the properties of the cipher and the features of underlying reconfigurable hardware. Presented design approaches can be reused when designing attacks against similar ciphers." . . . "RIV/68407700:21240/10:00167731!RIV11-MSM-21240___" . "Time-Area Efficient HW Architectures for Cryptography and Cryptanalysis" . . . . .