"USB Logick\u00FD Analyz\u00E1tor"@cs . "USB Logic Analyzer"@en . . "USB Logick\u00FD Analyz\u00E1tor"@cs . . . "P(GA102/09/1668)" . . . "[E9FF672881BD]" . . . "RIV/68407700:21240/09:00165712" . . . . "\u010CVUT FIT" . . "This paper describes design and detail analysis of fast and relatively cheap logic analyzer. Achieved parameters of outcome product are sampling rate at 100MHz for 32 bits wide measuring port. Measuring and data collection is realized in dedicated hardware, powered by FPGA Virtex-4. Control and data interpretation is realized as a software solution on PC platform for Windows XP operating system. Interface between dedicated hardware and PC software application is via fast USB 2.0 interface. Main parts of work are foremost design of fast USB 2.0 interface framework, DDR interface solution and gain experience in extensive VHLD design especially in EDK tool from Xilinx."@en . "USB Logick\u00FD Analyz\u00E1tor" . . "USB Logic Analyzer"@en . "Kubal\u00EDk, Pavel" . . "21240" . "Tato pr\u00E1ce obsahuje n\u00E1vrh a podrobnou anal\u00FDzu rychl\u00E9ho a relativn\u011B levn\u00E9ho logick\u00E9ho analyz\u00E1toru. Parametry v\u00FDsledn\u00E9ho produktu jsou vzorkovac\u00ED frekvence 100MHz pro 32 bitov\u00FD m\u011B\u0159\u00EDc\u00ED port. M\u011B\u0159en\u00ED a sb\u011Br dat je \u0159e\u0161en dedikovan\u00FDm hardwarem zalo\u017Een\u00FDm na FPGA obvodu Virtex-4. Ovl\u00E1d\u00E1n\u00ED a interpretace dat pak je \u0159e\u0161ena softwarov\u011B na platform\u011B PC v opera\u010Dn\u00EDm syst\u00E9mu Windows XP. Interface mezi m\u011B\u0159\u00EDc\u00EDm za\u0159\u00EDzen\u00EDm a PC je realizov\u00E1n rychlou sb\u011Brnic\u00ED USB 2.0. St\u011B\u017Eejn\u00ED \u010D\u00E1sti pr\u00E1ce jsou p\u0159edev\u0161\u00EDm rychl\u00E9 USB 2.0 rozhran\u00ED, rozhran\u00ED k DDR pam\u011Btem a z\u00EDsk\u00E1n\u00ED zku\u0161enost\u00ED v navrhov\u00E1n\u00ED komplexn\u00EDch za\u0159\u00EDzen\u00ED pomoc\u00ED jazyka VHDL a prost\u0159ed\u00ED EDK od firmy Xilinx. Logick\u00FD analyz\u00E1tor je ur\u010Den pro pot\u0159eb\u00FD anal\u00FDzy duplexn\u00EDho syst\u00E9mu zalo\u017Een\u00E9ho na FPGA obvodech. Syst\u00E9m slou\u017E\u00ED ke zvy\u0161ov\u00E1n\u00ED spolehlivostn\u00EDch parametr\u016F." . "2009-xkubalik-Bernatik" . "1000CZK, (v cen\u011B nen\u00ED zahrnuta v\u00FDvojov\u00E1 deska ML402)" . . . "347857" . "2"^^ . "Tato pr\u00E1ce obsahuje n\u00E1vrh a podrobnou anal\u00FDzu rychl\u00E9ho a relativn\u011B levn\u00E9ho logick\u00E9ho analyz\u00E1toru. Parametry v\u00FDsledn\u00E9ho produktu jsou vzorkovac\u00ED frekvence 100MHz pro 32 bitov\u00FD m\u011B\u0159\u00EDc\u00ED port. M\u011B\u0159en\u00ED a sb\u011Br dat je \u0159e\u0161en dedikovan\u00FDm hardwarem zalo\u017Een\u00FDm na FPGA obvodu Virtex-4. Ovl\u00E1d\u00E1n\u00ED a interpretace dat pak je \u0159e\u0161ena softwarov\u011B na platform\u011B PC v opera\u010Dn\u00EDm syst\u00E9mu Windows XP. Interface mezi m\u011B\u0159\u00EDc\u00EDm za\u0159\u00EDzen\u00EDm a PC je realizov\u00E1n rychlou sb\u011Brnic\u00ED USB 2.0. St\u011B\u017Eejn\u00ED \u010D\u00E1sti pr\u00E1ce jsou p\u0159edev\u0161\u00EDm rychl\u00E9 USB 2.0 rozhran\u00ED, rozhran\u00ED k DDR pam\u011Btem a z\u00EDsk\u00E1n\u00ED zku\u0161enost\u00ED v navrhov\u00E1n\u00ED komplexn\u00EDch za\u0159\u00EDzen\u00ED pomoc\u00ED jazyka VHDL a prost\u0159ed\u00ED EDK od firmy Xilinx. Logick\u00FD analyz\u00E1tor je ur\u010Den pro pot\u0159eb\u00FD anal\u00FDzy duplexn\u00EDho syst\u00E9mu zalo\u017Een\u00E9ho na FPGA obvodech. Syst\u00E9m slou\u017E\u00ED ke zvy\u0161ov\u00E1n\u00ED spolehlivostn\u00EDch parametr\u016F."@cs . "RIV/68407700:21240/09:00165712!RIV10-GA0-21240___" . "1"^^ . . . . "20x50 mm, 50g" . . "USB Logick\u00FD Analyz\u00E1tor" . "FPGA; USB; Logic analyzer"@en .