"120x60mm. Vlastn\u00EDkem v\u00FDsledku je \u010CVUT v Praze, I\u010C 68407700." . . "404398" . "\u010CVUT FIT" . . . "Tato diplomov\u00E1 pr\u00E1ce se zab\u00FDv\u00E1 n\u00E1vrhem a realizac\u00ED vysoce spolehliv\u00E9ho syst\u00E9mu zalo\u017Een\u00E9ho na obvodech FPGA. Syst\u00E9m je slo\u017Een z identick\u00FDch zar\u00EDzen\u00ED. Ka\u017Ed\u00E9 zar\u00EDzen\u00ED obsahuje obvod FPGA a MCU. Syst\u00E9m je slo\u017Een\u00FD z libovoln\u00E9ho poctu zar\u00EDzen\u00ED. C\u00E1st anal\u00FDza se zab\u00FDv\u00E1 n\u00E1vrhem propojen\u00ED zar\u00EDzen\u00ED a vhodn\u00FDm v\u00FDberem komponentu. Takto navr\u017Een\u00FD syst\u00E9m je odoln\u00FD proti poruch\u00E1m. Zar\u00EDzen\u00ED bylo \u00FAspe\u0161ne testov\u00E1no na jednoduch\u00E9 demonstracn\u00ED aplikaci, kter\u00E1 byla naps\u00E1na v r\u00E1mci t\u00E9to diplomov\u00E9 pr\u00E1ci." . "V\u00E1vra, L." . "[CBE2B62A9606]" . . . . . "FPGA; MCU; highly reliable system"@en . . . . "Kubal\u00EDk, Pavel" . . . "2"^^ . "RIV/68407700:21240/08:00165726" . "Highly reliable system based on FPGAs"@en . . . "21240" . . "1"^^ . "RIV/68407700:21240/08:00165726!RIV11-MSM-21240___" . "Z(MSM6840770014)" . . "Vysoce spolehliv\u00FD syst\u00E9m zalo\u017Een\u00FD na FPGA obvodech" . "Vysoce spolehliv\u00FD syst\u00E9m zalo\u017Een\u00FD na FPGA obvodech"@cs . . "This thesis deals with proposal and realization of highly reliable system based on FPGA. The system is built from any count of identical devices. Each device cosists of one FPGA and one MCU. In the analysis part is described proposal of connection of the devices and seletion of components. System designed like that is fault resistant. The system was succesfully tested by the simple demo application."@en . "2008-xkubalik-vavra" . "Highly reliable system based on FPGAs"@en . . "Vysoce spolehliv\u00FD syst\u00E9m zalo\u017Een\u00FD na FPGA obvodech"@cs . "5000,- za 1 modul" . . "Vysoce spolehliv\u00FD syst\u00E9m zalo\u017Een\u00FD na FPGA obvodech" . "Tato diplomov\u00E1 pr\u00E1ce se zab\u00FDv\u00E1 n\u00E1vrhem a realizac\u00ED vysoce spolehliv\u00E9ho syst\u00E9mu zalo\u017Een\u00E9ho na obvodech FPGA. Syst\u00E9m je slo\u017Een z identick\u00FDch zar\u00EDzen\u00ED. Ka\u017Ed\u00E9 zar\u00EDzen\u00ED obsahuje obvod FPGA a MCU. Syst\u00E9m je slo\u017Een\u00FD z libovoln\u00E9ho poctu zar\u00EDzen\u00ED. C\u00E1st anal\u00FDza se zab\u00FDv\u00E1 n\u00E1vrhem propojen\u00ED zar\u00EDzen\u00ED a vhodn\u00FDm v\u00FDberem komponentu. Takto navr\u017Een\u00FD syst\u00E9m je odoln\u00FD proti poruch\u00E1m. Zar\u00EDzen\u00ED bylo \u00FAspe\u0161ne testov\u00E1no na jednoduch\u00E9 demonstracn\u00ED aplikaci, kter\u00E1 byla naps\u00E1na v r\u00E1mci t\u00E9to diplomov\u00E9 pr\u00E1ci."@cs .