. "Kekrt, Daniel" . "Boh\u00E1\u010D, Leo\u0161" . "978-80-248-2261-7" . "[2725A04F6E9D]" . . . . "Podgorn\u00FD, Radek" . "Poly-phase Decimation Filter Implementation in VHDL" . . . "21230" . "Velk\u00E9 Losiny" . . "RTT 2010 Proceedings" . . "Poly-phase Decimation Filter Implementation in VHDL"@en . . . "4"^^ . "279805" . . "6"^^ . "4"^^ . "Ostrava" . "In this article we describe our effort to create, model, implement and simulate a poly-phase decimation filter. It is to be used as a part of advanced radio transmission system. We describe the process of modeling the filter in Matlab in both floating and fixed point arithmetic for later implementation in VHDL language for FPGA. The complete system is then being simulated in ISim, compared with the model and results are presented and evaluated." . "RIV/68407700:21230/10:00170678!RIV11-GA0-21230___" . "linear digital demodulation; matched filtration; complex envelope processing and decimation; inter-symbol interference"@en . "In this article we describe our effort to create, model, implement and simulate a poly-phase decimation filter. It is to be used as a part of advanced radio transmission system. We describe the process of modeling the filter in Matlab in both floating and fixed point arithmetic for later implementation in VHDL language for FPGA. The complete system is then being simulated in ISim, compared with the model and results are presented and evaluated."@en . "RIV/68407700:21230/10:00170678" . . . "P(FI-IM5/115), P(GAP102/10/1320), S, Z(MSM6840770014)" . . . . "Vysok\u00E1 \u0161kola b\u00E1\u0148sk\u00E1 - Technick\u00E1 univerzita Ostrava. Fakulta elektrotechniky a informatiky. Katedra elektroniky a telekomunika\u010Dn\u00ED techniky" . "Poly-phase Decimation Filter Implementation in VHDL" . . "Kl\u00EDma, Milo\u0161" . "2010-09-08+02:00"^^ . . . . "Poly-phase Decimation Filter Implementation in VHDL"@en . . . . .