"Design of scalable structures with defined dependability for system on chip"@en . . "2010-02-22+01:00"^^ . "2"^^ . "The method how to design a safety device of railway station efficiently and scalable is proposed. The safety device for any configuration of railway station can be built from five basic blocks. These basic blocks are connected together with universal interface. Each block is based on a finite state machine. The finite state machines are ?Moore? type. Each state machine is divided into three basic parts, where each part is designed as a selfchecking circuit ensuring fault detection. Our methodology is intended for final implementation in FPGA and hence SEU faults occurring in the system is assumed." . . . "1"^^ . "[6A5469C36393]" . "RIV/68407700:21230/10:00166068" . "Design of scalable structures with defined dependability for system on chip"@en . "Design of scalable structures with defined dependability for system on chip" . . "Praha" . . "Praha" . "1"^^ . . "Design of scalable structures with defined dependability for system on chip" . "FPGA; SEU; FSM; Fault tolerant"@en . . "978-80-01-04513-8" . . "RIV/68407700:21230/10:00166068!RIV15-MSM-21230___" . . . . . "P(GA102/09/1668), S, Z(MSM6840770014)" . "Workshop 2010" . . "Boreck\u00FD, Jaroslav" . "The method how to design a safety device of railway station efficiently and scalable is proposed. The safety device for any configuration of railway station can be built from five basic blocks. These basic blocks are connected together with universal interface. Each block is based on a finite state machine. The finite state machines are ?Moore? type. Each state machine is divided into three basic parts, where each part is designed as a selfchecking circuit ensuring fault detection. Our methodology is intended for final implementation in FPGA and hence SEU faults occurring in the system is assumed."@en . "253554" . . . . "\u010Cesk\u00E9 vysok\u00E9 u\u010Den\u00ED technick\u00E9 v Praze" . "21230" . . . . .