"Woburn" . "FPGA-based Speeded Up Robust Features"@en . "FPGA-based Speeded Up Robust Features" . . . "We present an implementation of the Speeded Up Robust Features (SURF) on a Field Programmable Gate Array (FPGA). The SURF algorithm extracts salient points from image and computes descriptors of their surroundings that are invariant to scale, rotation and illumination changes. The interest point detection and feature descriptor extraction algorithm is often used as the first stage in autonomous robot navigation, object recognition and tracking etc. However, detection and extraction are computationally demanding and therefore can't be used in systems with limited computational power. We took advantage of algorithm's natural parallelism and implemented it's most demanding parts in FPGA logic. Several modifications of the original algorithm have been made to increase it's suitability for FPGA implementation."@en . . . "machine vision; visual navigation; SURF; FPGA"@en . "FPGA-based Speeded Up Robust Features" . "P\u0159eu\u010Dil, Libor" . "We present an implementation of the Speeded Up Robust Features (SURF) on a Field Programmable Gate Array (FPGA). The SURF algorithm extracts salient points from image and computes descriptors of their surroundings that are invariant to scale, rotation and illumination changes. The interest point detection and feature descriptor extraction algorithm is often used as the first stage in autonomous robot navigation, object recognition and tracking etc. However, detection and extraction are computationally demanding and therefore can't be used in systems with limited computational power. We took advantage of algorithm's natural parallelism and implemented it's most demanding parts in FPGA logic. Several modifications of the original algorithm have been made to increase it's suitability for FPGA implementation." . . . . . "000289878100007" . . "4"^^ . . "P(2C06005), P(7E08006), Z(MSM6840770038)" . "4"^^ . . . . "2009-11-09+01:00"^^ . "7"^^ . "978-1-4244-4991-0" . "Faigl, Jan" . . . . . . . "IEEE" . . "\u0160v\u00E1b, Jan" . "Boston" . "21230" . "[1F0744F51FA2]" . . "2009 IEEE International Conference on Technologies for Practical Robot Applications" . . "10.1109/TEPRA.2009.5339646" . "RIV/68407700:21230/09:00159088!RIV13-MSM-21230___" . "315483" . "Krajn\u00EDk, Tom\u00E1\u0161" . "FPGA-based Speeded Up Robust Features"@en . . "RIV/68407700:21230/09:00159088" .