"2008-09-24+02:00"^^ . . . "High Tatras - Star\u00E1 Lesn\u00E1" . . . . "Kubal\u00EDk, Pavel" . "P(FI-IM4/149)" . "21230" . "Ko\u0161ice" . . "Experimental emulation of FPGA bitstream faults in combinatorial circuits" . "The main aim of our research is to design dependable circuit in FPGA. To make a real dependability model the real effects of injected errors and faults have to be studied. We proposed a hardware fault emulator here. The emulator deals with single-bit change in bitstream. Emulation is performed in user-selected area. Look-Up-Tables, cell interconnection, cell-to-bus connection and routing resources are considered. Other FPGA resources are not considered. Only combinatorial circuits and benchmarks were measured due to our knowledge of FPGA resource limitation. All tests were performed on Atmel FPSLIC architecture."@en . . "Experiment\u00E1ln\u00ED emulace poruch v bitstreamu FPGA v kombina\u010Dn\u00EDch obvodech"@cs . "[7C93FE5461BC]" . "Experimental emulation of FPGA bitstream faults in combinatorial circuits"@en . . "The main aim of our research is to design dependable circuit in FPGA. To make a real dependability model the real effects of injected errors and faults have to be studied. We proposed a hardware fault emulator here. The emulator deals with single-bit change in bitstream. Emulation is performed in user-selected area. Look-Up-Tables, cell interconnection, cell-to-bus connection and routing resources are considered. Other FPGA resources are not considered. Only combinatorial circuits and benchmarks were measured due to our knowledge of FPGA resource limitation. All tests were performed on Atmel FPSLIC architecture." . . "978-80-8086-092-9" . "RIV/68407700:21230/08:03147008!RIV09-MPO-21230___" . . . . "Proceedings of CSE 2008 International Scientific Conference on Computer Science and Engineering" . . "3"^^ . . "3"^^ . . "Experiment\u00E1ln\u00ED emulace poruch v bitstreamu FPGA v kombina\u010Dn\u00EDch obvodech"@cs . . "Kub\u00E1tov\u00E1, Hana" . "FPGA; FPGA fault models; SEU effect; SEU emulation; bitstream analysis"@en . "8"^^ . "367176" . . "Experimental emulation of FPGA bitstream faults in combinatorial circuits"@en . "Technick\u00E1 univerzita v Ko\u0161iciach. Fakulta elektrotechniky a informatiky. Katedra po\u010D\u00EDta\u010Dov a informatiky" . "Pr\u00E1ce se zab\u00FDv\u00E1 vlivem jednobitov\u00E9 poruchy v kombina\u010Dn\u00EDch obvodech implementovan\u00FDch v FPGA. Jsou zde pops\u00E1ny modely poruch v FPGA a v\u00FDsledky z experiment\u00E1ln\u00EDho m\u011B\u0159en\u00ED na emul\u00E1toru t\u011Bchto poruch."@cs . "Kvasni\u010Dka, Ji\u0159\u00ED" . "Experimental emulation of FPGA bitstream faults in combinatorial circuits" . . . . "RIV/68407700:21230/08:03147008" .