. . "Improvement of the Fault Coverage of the Pseudo-Random Phase in Column Matching BIST"@en . "Nen\u00ED k dispozici"@cs . "Improvement of the Fault Coverage of the Pseudo-Random Phase in Column Matching BIST" . "Porto" . "8"^^ . "Kub\u00E1tov\u00E1, Hana" . "2"^^ . "Improvement of the Fault Coverage of the Pseudo-Random Phase in Column Matching BIST"@en . "0-7695-2433-8" . "Nen\u00ED k dispozici"@cs . . . "Los Alamitos" . . "Improvement of the Fault Coverage of the Pseudo-Random Phase in Column Matching BIST" . "Not available"@en . . . "21230" . "RIV/68407700:21230/05:03109880" . "P(GA102/04/2137), Z(MSM6840770014)" . "524422" . . "Fi\u0161er, Petr" . . . . "IEEE Computer Society" . . "2005-08-30+02:00"^^ . . "56 ; 63" . "Several methods improving the fault coverage in mixed mode BIST are presented in this paper. The test is divided into two phases: the pseudo-random and deterministic. Maximum of faults should be detected by the pseudo-random phase, to reduce the number of faults to be covered in the deterministic one. We study the properties of different pseudo-random pattern generators. Their successfulness in fault covering strictly depends on the tested circuit. We examine properties of LFSRs and cellular automata. Four methods enhancing the pseudo random fault coverage have been proposed. Then we propose a universal method to efficiently compute test weights. The observations are documented on some of the standard ISCAS benchmarks and the final BIST circuitry is synthesized using the Column-Matching method." . . . "Several methods improving the fault coverage in mixed mode BIST are presented in this paper. The test is divided into two phases: the pseudo-random and deterministic. Maximum of faults should be detected by the pseudo-random phase, to reduce the number of faults to be covered in the deterministic one. We study the properties of different pseudo-random pattern generators. Their successfulness in fault covering strictly depends on the tested circuit. We examine properties of LFSRs and cellular automata. Four methods enhancing the pseudo random fault coverage have been proposed. Then we propose a universal method to efficiently compute test weights. The observations are documented on some of the standard ISCAS benchmarks and the final BIST circuitry is synthesized using the Column-Matching method."@en . "Nen\u00ED k dispozici"@cs . "[BA2A4B0797DC]" . "2"^^ . "RIV/68407700:21230/05:03109880!RIV06-GA0-21230___" . "Proceedings Eighth EUROMICRO Conference on Digital System Design" . . .