. "Kub\u00E1tov\u00E1, Hana" . . "On-line Testing for FPGA"@en . . "2004-09-22+02:00"^^ . . "On-line Testing for FPGA" . "2"^^ . . "194 ; 199" . "P(GA102/04/2137), Z(MSM 212300014)" . "Nen\u00ED k dispozici"@cs . "Ko\u0161ice - Her\u013Eany" . "2"^^ . . . "Nen\u00ED k dispozici"@cs . . . . "On-line Testing for FPGA"@en . "RIV/68407700:21230/04:03099663!RIV/2005/GA0/212305/N" . . "On-line Testing for FPGA" . . "[5E05EBB4B844]" . "21230" . "Kubal\u00EDk, Pavel" . "80-8073-150-0" . "6"^^ . . . . "FPGA; digital design; on-line testing; reliability"@en . . . "Ko\u0161ice" . "This paper focuses on the on-line error detection in circuits implemented in FPGAs. We have used error detection codes to ensure the self-checking property. A fault in a given combinational circuit has to be detected and signalized at the time of its appearance and before the further distribution of errors. Hence a safe operation of the designed system is guaranteed."@en . "Proceedings of the Sixth International Scientific Conference Electronic Computers and Informatics ECI 2004" . "RIV/68407700:21230/04:03099663" . . . "This paper focuses on the on-line error detection in circuits implemented in FPGAs. We have used error detection codes to ensure the self-checking property. A fault in a given combinational circuit has to be detected and signalized at the time of its appearance and before the further distribution of errors. Hence a safe operation of the designed system is guaranteed." . "Nen\u00ED k dispozici"@cs . "577997" . "Technick\u00E1 univerzita v Ko\u0161iciach. Fakulta elektrotechniky a informatiky. Katedra po\u010D\u00EDta\u010Dov a informatiky" . .