"\u00DATIA AV \u010CR, v.v, Praha" . "Stejskal, Jaroslav" . "P(2C06008), Z(AV0Z10750506)" . "Peripheral Controllers for Spartan3E Starter Kit Development Board"@en . "tech. zprava" . "RIV/67985556:_____/08:00316673!RIV09-MSM-67985556" . . "[C0405EDAC5FE]" . "\u0158adi\u010De periferi\u00ED pro v\u00FDvojovou desku Spartan3E Starter Kit"@cs . . . "Kadlec, Ji\u0159\u00ED" . . "391362" . . "\u0158adi\u010De periferi\u00ED pro v\u00FDvojovou desku Spartan3E Starter Kit" . . . . . "PicoBlaze; FPGA"@en . . . "Kafka, Leo\u0161" . "This package contains a set of peripheral controllers for Spartan3E Starter Kit development board (S3ESK). These modules allow to control these peripherals on higher level, which simplifies the use of these peripheral in FPGA-based applications. The modules are based on a configurable wrapper for Xilinx Picoblaze processor. The wrapper has been developed in UTIA as well."@en . . "Bal\u00ED\u010Dek obsahuje sadu modul\u016F pro ovl\u00E1d\u00E1n\u00ED periferi\u00ED na v\u00FDvojov\u00E9 desce Spartan3E Starter Kit (S3ESK). Moduly umo\u017E\u0148uj\u00ED ovl\u00E1d\u00E1n\u00ED t\u011Bchto periferi\u00ED na vy\u0161\u0161\u00ED \u00FArovni, \u010D\u00EDm\u017E usnad\u0148uj\u00ED pou\u017Eit\u00ED t\u011Bchto periferi\u00ED v aplikac\u00EDch na FPGA. P\u0159i implementaci t\u011Bchto modul\u016F byl pou\u017Eit konfigurovateln\u00FD wrapper procesoru Xilinx PicoBlaze, vyvinut\u00FD v UTIA." . . . . "RIV/67985556:_____/08:00316673" . "\u0158adi\u010De periferi\u00ED pro v\u00FDvojovou desku Spartan3E Starter Kit"@cs . . "Peripheral Controllers for Spartan3E Starter Kit Development Board"@en . . "4"^^ . . . "\u0158adi\u010De periferi\u00ED pro v\u00FDvojovou desku Spartan3E Starter Kit" . "4"^^ . "Bal\u00ED\u010Dek obsahuje sadu modul\u016F pro ovl\u00E1d\u00E1n\u00ED periferi\u00ED na v\u00FDvojov\u00E9 desce Spartan3E Starter Kit (S3ESK). Moduly umo\u017E\u0148uj\u00ED ovl\u00E1d\u00E1n\u00ED t\u011Bchto periferi\u00ED na vy\u0161\u0161\u00ED \u00FArovni, \u010D\u00EDm\u017E usnad\u0148uj\u00ED pou\u017Eit\u00ED t\u011Bchto periferi\u00ED v aplikac\u00EDch na FPGA. P\u0159i implementaci t\u011Bchto modul\u016F byl pou\u017Eit konfigurovateln\u00FD wrapper procesoru Xilinx PicoBlaze, vyvinut\u00FD v UTIA."@cs . . "tech. zpr\u00E1va +CD-ROM" . "Svozil, Ji\u0159\u00ED" . .