. . . . "4"^^ . "2007-08-27+02:00"^^ . . "P(1ET400750406), P(1M0567), Z(AV0Z10750506)" . "Amsterdam" . "3"^^ . . "3"^^ . "[1F14A443ED61]" . "Kadlec, Ji\u0159\u00ED" . "acceleration; floating point operation; coprocessor; MicroBlaze"@en . "Bartosinski, Roman" . "Accelerating MicroBlaze Floating Point Operations"@en . "IEEE" . "Accelerating MicroBlaze Floating Point Operations" . . . . . "Accelerating MicroBlaze Floating Point Operations" . "The MicroBlaze processor serves in many FPGA designs as the central 32 bit CPU with access to the global off chip memory and peripherals. MicroBlaze provides FSL links for up to 8 coprocessors. We present two MicroBlaze designs. The first design works with 8 PicoBlaze-based accelerators for pipelined, single-precision floating point vector-oriented operations, and delivers over 1.2 GFLOPs. The second design uses 4 similar double precision accelerators and delivers 600 MFLOPs. The acceleration results are documented on batch computation of a finite impulse response filter. Each PicoBlaze soft core can be re-programmed by MicroBlaze. This provides a framework for a partial dynamic change of the functionality of accelerators. This program change can be done via the FSL link in parallel with the current computation of the accelerator." . . "Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL)" . . . . . "Delft" . "978-1-4244-1059-0" . "The MicroBlaze processor serves in many FPGA designs as the central 32 bit CPU with access to the global off chip memory and peripherals. MicroBlaze provides FSL links for up to 8 coprocessors. We present two MicroBlaze designs. The first design works with 8 PicoBlaze-based accelerators for pipelined, single-precision floating point vector-oriented operations, and delivers over 1.2 GFLOPs. The second design uses 4 similar double precision accelerators and delivers 600 MFLOPs. The acceleration results are documented on batch computation of a finite impulse response filter. Each PicoBlaze soft core can be re-programmed by MicroBlaze. This provides a framework for a partial dynamic change of the functionality of accelerators. This program change can be done via the FSL link in parallel with the current computation of the accelerator."@en . . . "RIV/67985556:_____/07:00085964" . . . . "Accelerating MicroBlaze Floating Point Operations"@en . "408355" . "RIV/67985556:_____/07:00085964!RIV10-MSM-67985556" . "Dan\u011Bk, Martin" . . .