"Optimization of finite interval CMA implementation for FPGA"@en . . "He\u0159m\u00E1nek, Anton\u00EDn" . . "[74F894787274]" . "\u0160\u016Fcha, P." . "7"^^ . "2"^^ . "CMA; FPGA; logarithmic arithmetic; cyclic scheduling"@en . . . . "534891" . "4"^^ . . . "Athens" . . "Athens" . . . . "RIV/67985556:_____/05:00411508!RIV10-MSM-67985556" . "P(1ET300750402), P(1M0567), Z(AV0Z10750506)" . . "0-7803-9333-3" . . . "Optimization of finite interval CMA implementation for FPGA" . . . "IEEE" . "2005-11-02+01:00"^^ . "Hanz\u00E1lek, Z." . "Schier, Jan" . "RIV/67985556:_____/05:00411508" . . "Optimization of an FPGA implementation of iterative algorithms with nested loops is treated, using Integer Linear Programming. An example of the FI-CMA blind equalization algorithm is considered, using limited (and small) number of arithmetic units with non-zero latency. The optimization is based on cyclic scheduling with precedence delays for distinct dedicated processors. An optimally scheduled abstract model is constructed, modeling imperfectly nested loops." . . . . "Optimization of an FPGA implementation of iterative algorithms with nested loops is treated, using Integer Linear Programming. An example of the FI-CMA blind equalization algorithm is considered, using limited (and small) number of arithmetic units with non-zero latency. The optimization is based on cyclic scheduling with precedence delays for distinct dedicated processors. An optimally scheduled abstract model is constructed, modeling imperfectly nested loops."@en . "Optimization of finite interval CMA implementation for FPGA" . . "Optimization of finite interval CMA implementation for FPGA"@en . "Proceedings of the IEEE Workshop on Signal Processing Systems. SiPS 2005" .