"FPGA implementation of logarithmic unit core."@en . "Matou\u0161ek, Rudolf" . . "Kadlec, Ji\u0159\u00ED" . "N\u00FCrnberg [DE]" . . . . . . . "Implementation of floatig point in FPGA (Field Programmable Gate Arrays) is not easy. Paper presents FPGA core which implements these operations by representation of floating point numbers as 32-bit integer (fixed point) logarithm. Basic arithmetical operations are performed in the logarithm numbering system (LNS) suitable for FPGA. First, we describe Matlab library emulating bit-exactly the properties of the final hardware."@en . "field programmable gate array"@en . "Embedded Intelligence 2001." . "3"^^ . "3"^^ . "0"^^ . "0"^^ . "680693" . "2001-02-14+01:00"^^ . "Z(AV0Z1075907)" . "547;554" . "FPGA implementation of logarithmic unit core."@en . . . "[D4BF79E71E58]" . "L\u00ED\u010Dko, Miroslav" . "RIV/67985556:_____/01:16010114!RIV/2003/AV0/A16003/N" . "8"^^ . . "Design & Elektronik" . "FPGA implementation of logarithmic unit core." . . "RIV/67985556:_____/01:16010114" . . . "Implementation of floatig point in FPGA (Field Programmable Gate Arrays) is not easy. Paper presents FPGA core which implements these operations by representation of floating point numbers as 32-bit integer (fixed point) logarithm. Basic arithmetical operations are performed in the logarithm numbering system (LNS) suitable for FPGA. First, we describe Matlab library emulating bit-exactly the properties of the final hardware." . "FPGA implementation of logarithmic unit core." . . . . "N\u00FCrnberg" .