"P(TE01020415)" . "72627" . "embedded platform; ARM; FPGA; Xilinx Zynq"@en . "CAMEPZX-20130914" . . "Embedded platforma Camea ZX"@cs . . "Xilinx Zynq je kombinac\u00ED FPGA (tedy programovateln\u00E9ho logick\u00E9ho obvodu) a ARM procesoru umo\u017E\u0148uj\u00EDc\u00EDho b\u011Bh embedded opera\u010Dn\u00EDch syst\u00E9m\u016F (Linux atd.). Ob\u011B \u010D\u00E1sti jsou propojeny vysokorychlostn\u00ED AXI sb\u011Brnic\u00ED. Sou\u010D\u00E1st\u00ED Camea ZX platformy, respektive desky na kter\u00E9 je Zynq osazen jsou nezbytn\u00E9 porty jako USB, Ethernet, s\u00E9riov\u00E1 linka a dal\u0161\u00ED." . . . "\u0160ustek, Ji\u0159\u00ED" . "Embedded platform Camea ZX"@en . "Platform Camea ZX je zalo\u017Eena na hybridn\u00EDm \u010Dipu Xilinx Zynq, kombinaci FPGA a ARM procesoru. D\u00EDky d\u016Fmysln\u00E9mu propojen\u00ED obou \u010D\u00E1st\u00ED je mo\u017Eno prov\u00E1d\u011Bt sb\u011Br dat (A/D p\u0159evod a vzorkov\u00E1n\u00ED) v\u010Detn\u011B jejich p\u0159edzpracov\u00E1n\u00ED v FPGA \u010D\u00E1sti a pak velk\u00FD objem informac\u00ED p\u0159en\u00E1\u0161et pro n\u00E1sledn\u00E9 zpracov\u00E1n\u00ED do ARM procesoru. M\u016F\u017Ee j\u00EDt o \u00FAlohy zpracov\u00E1n\u00ED 1D i 2D sign\u00E1lu." . . . "The Camea ZX platform is based on hybrid chip Xilinx Zynq - the combination of FPGA and ARM processor. Because of well designed interconnecton bus between both parts, it is possible to perform data aquisition (A/D conversion and sampling) including optional pre-processing in FPGA and then big volume of data can be transfered to CPU for subsequent processing. The tasks can be 1D even 2D signal processing."@en . . . "Embedded platforma Camea ZX" . . "Embedded platform Camea ZX"@en . "Embedded platforma Camea ZX"@cs . "Platform Camea ZX je zalo\u017Eena na hybridn\u00EDm \u010Dipu Xilinx Zynq, kombinaci FPGA a ARM procesoru. D\u00EDky d\u016Fmysln\u00E9mu propojen\u00ED obou \u010D\u00E1st\u00ED je mo\u017Eno prov\u00E1d\u011Bt sb\u011Br dat (A/D p\u0159evod a vzorkov\u00E1n\u00ED) v\u010Detn\u011B jejich p\u0159edzpracov\u00E1n\u00ED v FPGA \u010D\u00E1sti a pak velk\u00FD objem informac\u00ED p\u0159en\u00E1\u0161et pro n\u00E1sledn\u00E9 zpracov\u00E1n\u00ED do ARM procesoru. M\u016F\u017Ee j\u00EDt o \u00FAlohy zpracov\u00E1n\u00ED 1D i 2D sign\u00E1lu."@cs . . "3"^^ . . . "RIV/60746220:_____/13:#0000070" . . "3"^^ . . "\u00FAspora n\u00E1klad\u016F, zv\u00FD\u0161en\u00ED zisku" . "Embedded platforma Camea ZX" . "[7F53CAC0189A]" . . . . . "Lisztwan, Marek" . . "RIV/60746220:_____/13:#0000070!RIV14-TA0-60746220" . "Ko\u0161\u00E1k, Ji\u0159\u00ED" . . . . .