"Optimalizovan\u00FD n\u00E1vrh PD-PWM modul\u00E1toru pro MLC interface" . "RIV/49777513:23220/13:43917869!RIV14-TA0-23220___" . . . . "PD-PWM, FLC, FPGA"@en . "RIV/49777513:23220/13:43917869" . . "Optimalizovan\u00FD n\u00E1vrh PD-PWM modul\u00E1toru pro MLC interface"@cs . . . "Optimalizovan\u00FD n\u00E1vrh PD-PWM modul\u00E1toru pro MLC interface"@cs . "Ko\u0161an, Tom\u00E1\u0161" . . "2"^^ . . . . "94409" . . "[53BED747ABCC]" . . "Optimized design of PD-PWM modulator for MLC interface"@en . . "P(ED2.1.00/03.0094), P(TA01010863)" . . "Jan\u00EDk, Du\u0161an" . "23220" . . . "This research report discusses the structure of modified PD-PWM modulator developed for FPGA for the control of four level converter with floating capacitor (FLC). Modifications of the architecture are based on specific requirements of the MLC controller interface."@en . "Tato v\u00FDzkumn\u00E1 zpr\u00E1va se zab\u00FDv\u00E1 podrobn\u00FDm popisem upraven\u00E9 struktury PD-PWM modul\u00E1toru navr\u017Een\u00E9ho v obvodu FPGA pro \u00FAlohu \u0159\u00EDzen\u00ED 4\u00FArov\u0148ov\u00E9ho m\u011Bni\u010De s plovouc\u00EDmi kondenz\u00E1tory (FLC). \u00DApravy struktury vych\u00E1zej\u00ED ze specifick\u00FDch po\u017Eadavk\u016F \u0159\u00EDd\u00EDc\u00ED jednotky MLC interface."@cs . "Tato v\u00FDzkumn\u00E1 zpr\u00E1va se zab\u00FDv\u00E1 podrobn\u00FDm popisem upraven\u00E9 struktury PD-PWM modul\u00E1toru navr\u017Een\u00E9ho v obvodu FPGA pro \u00FAlohu \u0159\u00EDzen\u00ED 4\u00FArov\u0148ov\u00E9ho m\u011Bni\u010De s plovouc\u00EDmi kondenz\u00E1tory (FLC). \u00DApravy struktury vych\u00E1zej\u00ED ze specifick\u00FDch po\u017Eadavk\u016F \u0159\u00EDd\u00EDc\u00ED jednotky MLC interface." . "Optimalizovan\u00FD n\u00E1vrh PD-PWM modul\u00E1toru pro MLC interface" . "Optimized design of PD-PWM modulator for MLC interface"@en . . . "2"^^ .