. . . . "Real time dynamic model of synchronous generator" . . "This work deals with development of device for generation two three-phase sinewave systems using direct digital synthesis. This device makes changing frequency, amplitude and phase shift of three-phase systems possible. The synthesis is implemented in a FPGA device Cyclone EP1C3. FPGA design is realized in integrated development environment Quartus II Web Edition using VHDL language." . . "80-7043-369-8" . "RIV/49777513:23220/05:00000217!RIV07-MSM-23220___" . . . . "2005-01-01+01:00"^^ . "S" . . . . . . "3"^^ . "23220" . "Modelov\u00E1n\u00ED dynamiky synchronn\u00EDho gener\u00E1toru v re\u00E1ln\u00E9m \u010Dase"@cs . "Applied electronics 2005" . . "Tato pr\u00E1ce se zab\u00FDv\u00E1 v\u00FDvojem gener\u00E1toru t\u0159\u00EDf\u00E1zov\u00E9ho sinusov\u00E9ho sign\u00E1lu na principu p\u0159\u00EDm\u00E9 \u010D\u00EDslicov\u00E9 synt\u00E9zy. V\u00FDsledn\u00E9 za\u0159\u00EDzen\u00ED umo\u017E\u0148uje zm\u011Bnu frakvence, amplitudy a vz\u00E1jmn\u00E9ho f\u00E1zov\u00E9ho posuvu. P\u0159\u00EDm\u00E1 \u010D\u00EDslicov\u00E1 synt\u00E9za je realizov\u00E1na v obvodu FPGA Cyclone EP1C3. Obvod FPGA je navr\u017Een v jazyce VHDL ve v\u00FDvojov\u00E9m prost\u0159ed\u00ED Quartus II Web Edition."@cs . "3"^^ . "Real time dynamic model of synchronous generator" . . . "This work deals with development of device for generation two three-phase sinewave systems using direct digital synthesis. This device makes changing frequency, amplitude and phase shift of three-phase systems possible. The synthesis is implemented in a FPGA device Cyclone EP1C3. FPGA design is realized in integrated development environment Quartus II Web Edition using VHDL language."@en . "4"^^ . . "540121" . "29-32" . . "Real time dynamic model of synchronous generator"@en . "Petr\u00E1nkov\u00E1, Zuzana" . "Kouck\u00FD, V\u00E1clav" . "Modelov\u00E1n\u00ED dynamiky synchronn\u00EDho gener\u00E1toru v re\u00E1ln\u00E9m \u010Dase"@cs . "Pilsen" . "Real time dynamic model of synchronous generator"@en . "RIV/49777513:23220/05:00000217" . . . "FPGA; Altera; Cyclone development module; VHDL; Quartus II; three-phase; DDS; direct digital synthesis"@en . . "Plze\u0148" . "Basl, Ji\u0159\u00ED" . "[D1ED6816B989]" . "Z\u00E1pado\u010Desk\u00E1 univerzita v Plzni" .