"Network monitoring probe based on Xilinx Zynq"@en . "978-1-4503-2839-5" . . "Ko\u0159enek, Jan" . "Association for Computing Machinery" . . . . "32216" . "RIV/00216305:26230/14:PU112037!RIV15-MV0-26230___" . . "Fuka\u010D, Tom\u00E1\u0161" . "2014-10-20+02:00"^^ . "To provide reliable network and cloud services, it is necessary to perform precise monitoring and security analysis of cloud, ISP and local networks. Current SOHO (Small Office Home Office) devices have very limited resources and can not provide precise network security monitoring in local networks. Therefore we have designed small and low-power network probe which is able to analyse the network traffic at the application layer. The Xilinx Zynq enables to divide the task between hardware and software efficiently. The FPGA logic provides preprocessing (filtering) of data and the processor performs deep packet inspection to analyse application protocols. Moreover, the probe is ready to offload any time consuming operation (eg. regular expression matching) to the FPGA logic to increase processing speed." . "26230" . "4"^^ . "Kor\u010Dek, Pavol" . "4"^^ . "Marina del Rey, CA, USA" . "RIV/00216305:26230/14:PU112037" . . . . "To provide reliable network and cloud services, it is necessary to perform precise monitoring and security analysis of cloud, ISP and local networks. Current SOHO (Small Office Home Office) devices have very limited resources and can not provide precise network security monitoring in local networks. Therefore we have designed small and low-power network probe which is able to analyse the network traffic at the application layer. The Xilinx Zynq enables to divide the task between hardware and software efficiently. The FPGA logic provides preprocessing (filtering) of data and the processor performs deep packet inspection to analyse application protocols. Moreover, the probe is ready to offload any time consuming operation (eg. regular expression matching) to the FPGA logic to increase processing speed."@en . . "Viktorin, Jan" . "Monitorov\u00E1n\u00ED, Probe, Xilinx, Zynq, ZE7000, Throughtput, RSoC Framework,"@en . "Kor\u010Dek, Pavol" . . . . . . . . . "Proceedings of the 2012 Tenth ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2014)" . "[48D96E19D45B]" . "Marina del Rey" . . . "Network monitoring probe based on Xilinx Zynq" . "2"^^ . . . . "Network monitoring probe based on Xilinx Zynq" . "10.1145/2658260.2661769" . "P(ED1.1.00/02.0070), P(VG20102015022), S" . . "Network monitoring probe based on Xilinx Zynq"@en . "http://dl.acm.org/citation.cfm?id=2661769" . .