"Ko\u0161a\u0159, Vlastimil" . "Ko\u0159enek, Jan" . . . . "RIV/00216305:26230/14:PU111928!RIV15-MSM-26230___" . "978-1-4799-4558-0" . "On NFA-Split Architecture Optimizations"@en . "2"^^ . . . . "IEEE Computer Society" . "2"^^ . "26230" . "The NFA-Split architecture is an efficient approach to the mapping of regular expressions to the FPGA. However, the NFA-Split architecture has some drawbacks. The most significant are the high time complexity due to usage of determinisation to detect simultaneously active states. The other one is in some cases high consumption of BRAMs. The paper presents solutions of those drawbacks. According to the results up to 39 times overall speedup of construction of the NFA-Split architecture was achieved. Reduction of utilized BRAMs is up to 97%." . "P(ED1.1.00/02.0070), S, Z(MSM0021630528)" . . "RIV/00216305:26230/14:PU111928" . . . . "4"^^ . "34330" . "On NFA-Split Architecture Optimizations" . . "The NFA-Split architecture is an efficient approach to the mapping of regular expressions to the FPGA. However, the NFA-Split architecture has some drawbacks. The most significant are the high time complexity due to usage of determinisation to detect simultaneously active states. The other one is in some cases high consumption of BRAMs. The paper presents solutions of those drawbacks. According to the results up to 39 times overall speedup of construction of the NFA-Split architecture was achieved. Reduction of utilized BRAMs is up to 97%."@en . . . "Regular expressions, Pattern matching, FPGA, NFA"@en . "2014-04-23+02:00"^^ . . . "On NFA-Split Architecture Optimizations" . . . "[C85814B481B3]" . . "10.1109/DDECS.2014.6868808" . "Warsaw" . "Warsaw" . . . "2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)" . . "On NFA-Split Architecture Optimizations"@en .