"125477" . . "P(GAP103/10/1517), Z(MSM0021630528)" . . "Branching Program-Based Programmable Logic for Embedded Systems"@en . . "Branching Program-Based Programmable Logic for Embedded Systems" . "RIV/00216305:26230/12:PU98158!RIV13-GA0-26230___" . "Francouzsk\u00E1 republika" . "RIV/00216305:26230/12:PU98158" . . "26230" . . . . "978-1-61208-184-7" . . . "Branching Program-Based Programmable Logic for Embedded Systems"@en . . "Boolean functions, multi-terminal binary decision diagrams MTBDDs, branching programs, MTBDD complexity, decision diagram machines DDMs"@en . . . "The paper considers realization of logic functions by branching programs running on special purpose Decision Diagram Machines (DDMs). It is not the fastest way to implement logic, but it enables different versions and frequent modifications, e.g. in embedded systems. First, this paper derives upper bounds on the cost of multi-terminal binary decision diagrams (MTBDDs); the cost is directly related to the size of branching programs derived from MTBDDs. Second, optimization of heterogeneous branching programs is undertaken that makes a space-time trade-off between the amount of memory required for a branching program and its execution time. As a case study, optimal architectures of branching programs are found for a set of benchmark tasks. Beside DDMs, the technique can also be used for micro-controllers with a support for multi-way branching running logic-intensive embedded firmware." . "2012-02-29+01:00"^^ . "International Academy, Research, and Industry Association" . . "[94EBE33BD0BF]" . . "The paper considers realization of logic functions by branching programs running on special purpose Decision Diagram Machines (DDMs). It is not the fastest way to implement logic, but it enables different versions and frequent modifications, e.g. in embedded systems. First, this paper derives upper bounds on the cost of multi-terminal binary decision diagrams (MTBDDs); the cost is directly related to the size of branching programs derived from MTBDDs. Second, optimization of heterogeneous branching programs is undertaken that makes a space-time trade-off between the amount of memory required for a branching program and its execution time. As a case study, optimal architectures of branching programs are found for a set of benchmark tasks. Beside DDMs, the technique can also be used for micro-controllers with a support for multi-way branching running logic-intensive embedded firmware."@en . . "1"^^ . "Proceedings of ICONS 2012" . "1"^^ . . "Dvo\u0159\u00E1k, V\u00E1clav" . "7"^^ . . . . . "Branching Program-Based Programmable Logic for Embedded Systems" . . "New York" .