"Testability analysis, data-path, register-transfer level, transparency, I-path concept, virtual port, digraph, test-pattern data-flow digraph, test-response data-flow digraph, graph algorithm, design for testability, scan, benchmark circuit."@en . "VIRTA: Virtual Port Based Register-Transfer Level Testability Analysis and Improvements"@en . "VIRTA: Anal\u00FDza a zlep\u0161en\u00ED testovatelnosti zalo\u017Een\u00E1 na virtu\u00E1ln\u00EDch portech"@cs . . "The work deals with testability analysis of data-path within register-transfer level digital circuits and with utilizing its results in selected areas in digital circuit diagnostics area. In the work, it is shown that it is advantageous if each module stored in a design library is equipped both with design-related information and special diagnostics-related information usable for testability-analysis purposes in our case. During our research, such information was described by means of a formal mathematiical model based on so-called transparency conception. Proposed digraph-search based testability analysis method is described by means of instruments specified in the model." . "VIRTA: Virtual Port Based Register-Transfer Level Testability Analysis and Improvements" . "Sopron" . . "Sopron" . . "4"^^ . . . . . . "P(GA102/04/0737), P(GP102/05/P193)" . "26230" . . . "Strnadel, Josef" . . . . "RIV/00216305:26230/05:PU55722" . . "Proceedings of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop" . . . . . "190-193" . . . "The work deals with testability analysis of data-path within register-transfer level digital circuits and with utilizing its results in selected areas in digital circuit diagnostics area. In the work, it is shown that it is advantageous if each module stored in a design library is equipped both with design-related information and special diagnostics-related information usable for testability-analysis purposes in our case. During our research, such information was described by means of a formal mathematiical model based on so-called transparency conception. Proposed digraph-search based testability analysis method is described by means of instruments specified in the model."@en . "VIRTA: Virtual Port Based Register-Transfer Level Testability Analysis and Improvements"@en . "RIV/00216305:26230/05:PU55722!RIV06-GA0-26230___" . "1"^^ . . . . "1"^^ . "VIRTA: Anal\u00FDza a zlep\u0161en\u00ED testovatelnosti zalo\u017Een\u00E1 na virtu\u00E1ln\u00EDch portech"@cs . . . "2005-04-13+02:00"^^ . "963-9364-48-7" . "VIRTA: Virtual Port Based Register-Transfer Level Testability Analysis and Improvements" . . "[00B965877FB7]" . . "548869" . "University of West Hungary" . "\u010Cl\u00E1nek se zab\u00FDv\u00E1 anal\u00FDzou datov\u00E9 cesty \u010D\u00EDslicov\u00E9ho obvodu na \u00FArovni meziregistrov\u00FDch p\u0159enos\u016F a vyu\u017Eit\u00EDm jej\u00EDch v\u00FDsledk\u016F ve vybran\u00FDch oblastech diagnostiky \u010D\u00EDslicov\u00FDch syst\u00E9m\u016F. Metoda je zalo\u017Eena na tzv. virtu\u00E1ln\u00EDch portech, konstrukci dvojice speci\u00E1ln\u00EDchorientovan\u00FDch graf\u016F (graf datov\u00E9ho toku testovac\u00EDch vzork\u016F, graf datov\u00E9ho toku odezev) a jejich anal\u00FDze."@cs .