"1"^^ . . . . . . "MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process"@en . "NEUVEDEN" . "sigma-delta modulation, quantization"@en . "1"^^ . "Model 16-bitov\u00E9ho sigma-delta modul\u00E1toru s dv\u011Bma kroky kvantovac\u00EDho procesu v Matlabu"@cs . . "MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process" . "484415" . . "2-908849-17-8" . . "RIV/00216305:26220/06:PU57967!RIV08-GA0-26220___" . . . "Suvisoft Oy ltd., Finland" . . "P(GA102/05/0869), P(GD102/03/H105), Z(MSM0021630503)" . "MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process"@en . . "This paper presents a novel architecture of highorder single-stage sigma-delta (Σ∆) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of Σ∆ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) Σ∆ modulator was simulated with blocks containing nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages)." . . "[2CE785F0A33A]" . "87-90" . . "Second International Symposium on Communications, Control and Signal Processing, ISCCSP 2006" . . . "This paper presents a novel architecture of highorder single-stage sigma-delta (Σ∆) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of Σ∆ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) Σ∆ modulator was simulated with blocks containing nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages)."@en . . "Marrakech" . "MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process" . "Model 16-bitov\u00E9ho sigma-delta modul\u00E1toru s dv\u011Bma kroky kvantovac\u00EDho procesu v Matlabu"@cs . "26220" . "RIV/00216305:26220/06:PU57967" . "2006-03-13+01:00"^^ . . "\u010Cl\u00E1nek popisuje novou architekturu p\u0159evodn\u00EDku sigma-delta vy\u0161\u0161\u00EDho \u0159\u00E1du pro senzorov\u00E9 m\u011B\u0159en\u00ED. P\u0159evodn\u00EDk s dvoustup\u0148ov\u00FDm kvantovac\u00EDm procesem je vyu\u017Eit jako v\u00EDcebitov\u00FD kvantovac\u00ED obvod.Prezentov\u00E1na acrhitektura byla namodelov\u00E1na v prost\u0159ed\u00ED Matlab Simulink.V modelu 16-bitov\u00E9ho sigma-delta modul\u00E1toru jsou zahrnuty parazitn\u00ED vlivy, kter\u00E9 se u sigma-delta modul\u00E1tor\u016F objevuj\u00ED."@cs . "Fujcik, Luk\u00E1\u0161" . "4"^^ .