"A 12-BIT LOW POWER SC PIPELINED ADC USING NOVEL BACKGROUND CALIBRATION APPROACH"@en . "A 12-BIT LOW POWER SC PIPELINED ADC USING NOVEL BACKGROUND CALIBRATION APPROACH"@en . "5"^^ . "5"^^ . "12-bitov\u00FD p\u0159evodn\u00EDk AD v technice sp\u00EDnan\u00FDch kapacitor\u016F vyu\u017E\u00EDvaj\u00EDc\u00ED novou postkalibra\u010Dn\u00ED techniku"@cs . "Sko\u010Ddopole, Michal" . "P(GA102/03/0619), P(GA102/05/0869), P(GD102/03/H105), Z(MSM0021630503)" . "5"^^ . "2005-07-25+02:00"^^ . "Fujcik, Luk\u00E1\u0161" . . "283-287" . . "Limerick, Irsko" . "The paper deals with a novel 12-bit low power switchedcapacitor (SC) pipelined analog-to-digital converter (ADC). The problems caused by using of SC technique are compensated or roughly attenuated by means of combination of well-known analog-domain techniques and new digital background calibration technique. Since portable applications demand for low power consumption, it is one of the most important issues considered in the design. A modified operational-amplifier (op-amp) sharing technique was used to decrease the power usage as well as capacitor scaling approach. To avoid the clock feedthrough from digital part through the switches the fully differential circuitry was utilized. The special op-amps and comparators were designed for this purpose and to obtain large bandwidth. The power consumption of the op-amps was taken into account too. The finite op-amp dc gain problem is solved in digital-domain using background calibration. The capacitor mismatch and op-amp offset are compensa"@en . "Proceedings of the 5th IEE International Conference on ADDA 2005" . . "A 12-BIT LOW POWER SC PIPELINED ADC USING NOVEL BACKGROUND CALIBRATION APPROACH" . . . "0-86341-542-3" . . . "RIV/00216305:26220/05:PU50786!RIV07-GA0-26220___" . . "Tento p\u0159\u00EDsp\u011Bvek pojedn\u00E1v\u00E1 o nov\u00E9 postkalibra\u010Dn\u00ED metod\u011B, kter\u00E1 koriguje n\u011Bkter\u00E9 chyby, kter\u00E9 vznikaj\u00ED p\u0159evodem v \u0159et\u011Bzov\u00E9m p\u0159evodn\u00EDku AD (ADC) p\u0159i pou\u017Eit\u00ED obvodov\u00E9 techniky sp\u00EDnan\u00FDch kapacitor\u016F (SC). Spolu s n\u011Bkter\u00FDmi modifikovan\u00FDmi obvodov\u00FDmi principy pak komplexn\u011B \u0159e\u0161\u00ED probl\u00E9my, kter\u00E9 s technikou SC souvisej\u00ED. Samotn\u00FD n\u00E1vrh \u0159et\u011Bzov\u00E9ho ADC byl ovlivn\u011Bn n\u011Bkolika po\u017Eadavky, a to zejm\u00E9na n\u00EDzkou spot\u0159ebou (pro pou\u017Eit\u00ED v p\u0159enosn\u00FDch za\u0159\u00EDzen\u00EDch), dobr\u00FDm rozli\u0161en\u00EDm p\u0159i vysok\u00E9 rychlosti p\u0159evodu, vysokou linearitou p\u0159evodu a odolnost\u00ED v\u016F\u010Di parazitn\u00EDm vliv\u016Fm jako jsou r\u016Fzn\u00E9 druhy \u0161um\u016F, parazitn\u00ED kapacity apod."@cs . "26220" . . "Sajdl, Ond\u0159ej" . . . . . . . "12-bitov\u00FD p\u0159evodn\u00EDk AD v technice sp\u00EDnan\u00FDch kapacitor\u016F vyu\u017E\u00EDvaj\u00EDc\u00ED novou postkalibra\u010Dn\u00ED techniku"@cs . . "RIV/00216305:26220/05:PU50786" . "Pipelined ADC, switched-capacitor technique, background calibration, portable application."@en . "A 12-BIT LOW POWER SC PIPELINED ADC USING NOVEL BACKGROUND CALIBRATION APPROACH" . . "[42B8A230ECF0]" . "511154" . . . "Limerick" . "H\u00E1ze, Ji\u0159\u00ED" . . . "The paper deals with a novel 12-bit low power switchedcapacitor (SC) pipelined analog-to-digital converter (ADC). The problems caused by using of SC technique are compensated or roughly attenuated by means of combination of well-known analog-domain techniques and new digital background calibration technique. Since portable applications demand for low power consumption, it is one of the most important issues considered in the design. A modified operational-amplifier (op-amp) sharing technique was used to decrease the power usage as well as capacitor scaling approach. To avoid the clock feedthrough from digital part through the switches the fully differential circuitry was utilized. The special op-amps and comparators were designed for this purpose and to obtain large bandwidth. The power consumption of the op-amps was taken into account too. The finite op-amp dc gain problem is solved in digital-domain using background calibration. The capacitor mismatch and op-amp offset are compensa" . . "IEE" . . . . "Vrba, Radim\u00EDr" .