"TIME-TO-DIGIT CONVERTER (TDC)"@en . . "Vacek, Michael" . "RIV/00010669:_____/12:#0001526!RIV13-MPO-00010669" . . "3"^^ . "RIV/00010669:_____/12:#0001526" . "TIME-TO-DIGIT CONVERTER (TDC)" . . "174496" . "Mich\u00E1lek, Vojt\u011Bch" . . . "3"^^ . . . . . . . "R-5567" . "time-to-digit converter; FPGA; passive delay line"@en . . . "http://www.vzlu.cz/cz/transfer-vysledku/funkcni-vzorek-g-funk/" . . . "Peca, Marek" . "The Time-to-Digit Converter (TDC) performs absolute event time measurement w.r.t. external stable clock signal. The TDC is based on single-chip, all-digital principle currently synthesized into FPGA fabric; event (pulse edge) measurement is performed by coarse counter sampling and on-chip vernier. Multiple event channels within one chip are possible." . "P\u0159evodn\u00EDk \u010Das-\u010D\u00EDslo je z\u00E1kladn\u00EDm stavebn\u00EDm kamenem jednofotonov\u00E9ho laserov\u00E9ho d\u00E1lkom\u011Bru; d\u00E1le je pou\u017Eiteln\u00FD jako sou\u010D\u00E1st p\u0159\u00EDstroj\u016F pro fluorescen\u010Dn\u00ED spektroskopii, pro \u010Dasov\u011B korelovan\u00E9 zobrazov\u00E1n\u00ED v medic\u00EDn\u011B a pro m\u011B\u0159en\u00ED \u010Dasu a frekvence v telekomunika\u010Dn\u00EDch a naviga\u010Dn\u00EDch syst\u00E9mech. V\u00FDroba a prodej takov\u00E9hoto p\u0159evodn\u00EDku zv\u00FD\u0161\u00ED p\u0159\u00EDjmy v \u0159\u00E1dech stovek tis. K\u010D." . . . "[1BB6F475D71D]" . . "TIME-TO-DIGIT CONVERTER (TDC)"@en . "I" . "TIME-TO-DIGIT CONVERTER (TDC)" . . . "Reference clock (100 MHz); inputs: channel #1 event input; input signal standards, channel #2 event input; input signal standards: (a) 3.3V LVCMOS @50 W/1 W, SMA connectors, (b) LVDS/RSPECL, RJ-45 connectors, (c) high-speed comparators, SMA connectors; output: USB 1.1 CDC ACM (virtual serial port); maximum repeating frequency: 10 MHz (limited by USB 1.1 & protocol verbosity). Funk\u010Dn\u00ED vzorek byl vyroben a ov\u011B\u0159en." . "The Time-to-Digit Converter (TDC) performs absolute event time measurement w.r.t. external stable clock signal. The TDC is based on single-chip, all-digital principle currently synthesized into FPGA fabric; event (pulse edge) measurement is performed by coarse counter sampling and on-chip vernier. Multiple event channels within one chip are possible."@en . .