. "1"^^ . . "2015-04-29+02:00"^^ . . . " programovateln\u00E9 obvody" . "The project aim is a developement of a techniques and methodology for verification of the reliability of integrated circuits produced by nowadays technologies, usually described as nano-scale IC. These technologies (advanced CMOS processes, CNT - Carbon Nano-Tube, graphene, Si-nanowires, etc.) requires a different approach in terms of reliability. It is necessary to take into account new fault models and new test techniques, to implement new approaches that enable continuous evaluation of the critical parameters of the integrated circuits. Aim of the project is to analyze the fault types and create new tools for the preparation of test data which can cover other types of failures. These objectives are focused both on a standard ASIC circuits and on circuits which allow the change of the functionality using partial or full reconfiguration (FPGA circuits) - part of this solution is the methodology of implementation of desired functions to these circuits and also implementation in multiprocessor systems."@en . " odolnost proti poruch\u00E1m" . "spolehlivost" . "2013-03-21+01:00"^^ . "19"^^ . . "19"^^ . . . . "2014-02-27+01:00"^^ . " \u010D\u00EDslicov\u00E9 syst\u00E9my" . . . . . "LD13019" . " rekonfigurovateln\u00E9 obvody" . . . . . "spolehlivost; odolnost proti poruch\u00E1m; \u010D\u00EDslicov\u00E9 syst\u00E9my; programovateln\u00E9 obvody; rekonfigurovateln\u00E9 obvody; komprese testovac\u00EDch dat"@en . . "SPONA - Zv\u00FD\u0161en\u00ED spolehlivosti nanoscale obvod\u016F" . "C\u00EDlem projektu je vytvo\u0159en\u00ED metodiky pro posouzen\u00ED a ov\u011B\u0159en\u00ED spolehlivosti obvod\u016F vyr\u00E1b\u011Bn\u00FDch modern\u00EDmi v\u00FDrobn\u00EDmi technologiemi tzv. nano-scale obvod\u016F. Tyto technologie (nejen zdokonalen\u00E9 CMOS procesy, ale i technologie Carbon-Nano-Tube, Graphen, Si-nanowires atp.) vy\u017Eaduj\u00ED odli\u0161n\u00FD p\u0159\u00EDstup z hlediska spolehlivosti. Je t\u0159eba br\u00E1t v \u00FAvahu nov\u00E9 modely poruch, nov\u00E9 testovac\u00ED techniky, implementovat p\u0159\u00EDstupy, kter\u00E9 umo\u017En\u00ED pr\u016Fb\u011B\u017En\u00E9 vyhodnocov\u00E1n\u00ED parametr\u016F kritick\u00FDch obvod\u016F a pod. C\u00EDlem projektu tedy je anal\u00FDza typ\u016F poruch nov\u00FDch technologi\u00ED, vytvo\u0159en\u00ED nov\u00FDch \u010Di zdokonalen\u00ED existuj\u00EDc\u00EDch n\u00E1stroj\u016F pro p\u0159\u00EDpravu testovac\u00EDch dat se zahrnut\u00EDm dal\u0161\u00EDch typ\u016F poruch a v neposledn\u00ED \u0159ad\u011B i vytvo\u0159en\u00ED metodiky pro vyhodnocov\u00E1n\u00ED spolehlivosti obvod\u016F. Tyto c\u00EDle jsou zam\u011B\u0159eny jak na standardn\u00ED ASIC obvody, tak na obvody umo\u017E\u0148uj\u00EDc\u00ED zm\u011Bnu funkce pomoc\u00ED \u010D\u00E1ste\u010Dn\u00E9 i \u00FApln\u00E9 rekonfigurace (FPGA obvody) - sou\u010D\u00E1st\u00ED \u0159e\u0161en\u00ED je tedy i metodika implementace po\u017Eadovan\u00FDch funkc\u00ED do t\u011Bchto obvod\u016F a implementace do v\u00EDceprocesorov\u00FDch syst\u00E9m\u016F." . "Improvement in Reliability of Nano-scale circuits"@en . "0"^^ . "http://www.isvav.cz/projectDetail.do?rowId=LD13019"^^ . "0"^^ . . "2015-11-30+01:00"^^ .