"http://www.isvav.cz/projectDetail.do?rowId=GP14-14292P"^^ . "2015-02-09+01:00"^^ . . " data processing" . "2014-01-01+01:00"^^ . " OpenCL" . . " database" . "7"^^ . . "7"^^ . . . " CUDA" . "Employing Modern Parallel Architectures in Specific Domains of Database Systems"@en . "parallel, architectures, database, data processing, GPGPU, OpenCL, CUDA, Xeon Phi"@en . "1"^^ . . . "0"^^ . . . . "0"^^ . "GP14-14292P" . "2016-12-31+01:00"^^ . . . . . . . "Nasazen\u00ED modern\u00EDch paraleln\u00EDch architektur ve specifick\u00FDch oblastech datab\u00E1zov\u00FDch syst\u00E9m\u016F" . "The project is a followup of the applicants previous work in parallel data processing. It explores the usability of modern parallel architectures in database management systems, with specific focus on commodity parallel hardware such as multicore CPUs, generic purpose GPUs, and the new Intel MIC architecture (Xeon Phi). Previously identified database problems from the are going to be addressed, such as accelerating join operations in relational databases, distance computations in similarity models, top-k selections in content-based retrieval, or specific algorithms in tree-like and graph-like datasets (e.g., XML, RDF, or linked-data). Each problem will be throroughly analyzed and parallel solutions for selected architectures will be designed, implemented, and verified experimentally. The results will be summarized in guidelines for programmers who design database systems and applications which process large amounts of data. Furthermore, implemented parallel prototypes will provide a basis for future application research and as experimental tools for related research."@en . . "2014-04-07+02:00"^^ . " architectures" . "parallel" . "Tento projekt navazuje na p\u0159edchoz\u00ED pr\u00E1ci navrhovatele v oblasti paraleln\u00EDho zpracov\u00E1n\u00ED dat. Hlavn\u00EDm p\u0159edm\u011Btem je zkoum\u00E1n\u00ED mo\u017Enost\u00ED nasazen\u00ED modern\u00EDch paraleln\u00EDch architektur, jako jsou v\u00EDcej\u00E1drov\u00E9 procesory, grafick\u00E9 procesory s podporou obecn\u00FDch v\u00FDpo\u010Dt\u016F nebo nov\u00E1 architektura Intel MIC (Xeon Phi), v datab\u00E1zov\u00FDch syst\u00E9mech. Pr\u00E1ce se zam\u011B\u0159\u00ED na ji\u017E identifikovan\u00E9 datab\u00E1zov\u00E9 probl\u00E9my, zejm\u00E9na pak operace join v rela\u010Dn\u00EDch datab\u00E1z\u00EDch, v\u00FDpo\u010Dty vzd\u00E1lenostn\u00EDch funkc\u00ED v podobnostn\u00EDm vyhled\u00E1v\u00E1n\u00ED, nalezen\u00ED k-nejpodobn\u011Bj\u0161\u00EDch prvk\u016F nebo specifick\u00E9 algoritmy ve stromov\u011B a grafov\u011B definovan\u00FDch datech (nap\u0159. XML, RDF nebo linked-data). Ka\u017Ed\u00FD z probl\u00E9m\u016F bude podrobn\u011B analyzov\u00E1n a vhodn\u00E1 paraleln\u00ED \u0159e\u0161en\u00ED budou navr\u017Eena, implementov\u00E1na a experiment\u00E1ln\u011B ov\u011B\u0159ena. Implementovan\u00E9 prototypy paraleln\u00EDch \u0159e\u0161en\u00ED poskytnou z\u00E1klad pro dal\u0161\u00ED aplika\u010Dn\u00ED v\u00FDzkum a pro experiment\u00E1ln\u00ED n\u00E1stroje v souvisej\u00EDc\u00EDm z\u00E1kladn\u00EDm v\u00FDzkumu." . " GPGPU" .