"2009-12-31+01:00"^^ . . . "2010-04-15+02:00"^^ . . . "The main objective of the project is to create a theoretical and methodological base for computer-aided and automatic verification and validation of large software and hardware systems. The project aims to support the development of methodologies, technologies and tools of software engineering in automatic and computer-aided verificacion. The project is to contribute to the research into new technologies for a realistic modelling of large systems, including real-time systems and probabilistic systems, especially with respect to their safety. The aim is to design effective implementations of these models as well as efficient verification technologies based on such models. The project will focus on embedded, distributed and parallel systems. Taking into consideration the complexity of verification processes, the aim is to design methodologies that will make the maximum possible use of new information technologies, such as parallel and distributed computing and hierarchical memories."@en . "2005-01-01+01:00"^^ . "1ET408050503" . "0"^^ . "computer aided and automatic verification" . "1"^^ . "2009-03-11+01:00"^^ . . "Hlavn\u00EDm c\u00EDlem projektu je vytvo\u0159en\u00ED teoreticko-metodologick\u00E9ho z\u00E1zem\u00ED po\u010D\u00EDta\u010Dem podporovan\u00E9 a automatick\u00E9 verifikace rozs\u00E1hl\u00FDch softwarov\u00FDch a hardwarov\u00FDch syst\u00E9m\u016F. Projekt si klade za \u00FAkol podpo\u0159it v\u00FDvoj metodologi\u00ED, technologi\u00ED a n\u00E1stroj\u016F softwarov\u00E9ho in\u017Een\u00FDrstv\u00ED v oblasti technik automatick\u00E9 verifikace. Projekt p\u0159isp\u011Bje k v\u00FDzkumu sm\u011B\u0159uj\u00EDc\u00EDmu k rozvoji poznatk\u016F o technologi\u00EDch pro realistick\u00E9 modelov\u00E1n\u00ED rozs\u00E1hl\u00FDch syst\u00E9m\u016F, v\u010Detn\u011B syst\u00E9m\u016F re\u00E1ln\u00E9ho \u010Dasu a pravd\u011Bpodobnostn\u00EDch syst\u00E9m\u016F, specieln\u011B s ohledem na bezpe\u010Dnost jejich provozu. C\u00EDlem je navrhnout efektivn\u00ED implementace t\u011Bchto model\u016F a na nich zalo\u017Een\u00FDch metodologi\u00EDch pro efektivn\u00ED verifikaci. Projekt se zam\u011B\u0159\u00ED na zapouzd\u0159en\u00E9, distribuovan\u00E9 a paraleln\u00ED syst\u00E9my. Vzhledem k v\u00FDpo\u010Detn\u00ED n\u00E1ro\u010Dnosti a rozs\u00E1hlosti procesu verifikace je c\u00EDlem navrhnout metodologie vyu\u017E\u00EDvaj\u00EDc\u00ED v maxim\u00E1ln\u00ED m\u00ED\u0159e i nov\u00E9 mo\u017Enosti v\u00FDpo\u010Detn\u00EDch technologi\u00ED, nap\u0159. ve smyslu paraleln\u00EDho a distribuovan\u00E9ho po\u010D\u00EDtan\u00ED a v hierarchick\u00E9m p\u0159\u00EDstupu k pam\u011Bti." . "http://www.isvav.cz/projectDetail.do?rowId=1ET408050503"^^ . . "0"^^ . " embedded systems" . . . . . . . . "computer aided and automatic verification; theory and technology of modelling of large systems; methodology of software engineering; embedded systems; parallel and distributed systems; real time systems"@en . . " theory and technology of modelling of large systems" . " parallel and distributed systems" . "Techniques for automatic verification and validation of software and hardware systems"@en . "96"^^ . "96"^^ . . "Paraleln\u00ED algoritmy pro z\u00E1kladn\u00ED pod\u00FAlohy p\u0159i automatizovan\u00E9 verifikaci (detekce akceptuj\u00EDc\u00EDch cykl\u016F v orientovan\u00FDch grafech, rozklad na siln\u011B souvisl\u00E9 komponenty ap.). V\u00FDvoj paraleln\u00EDho verifika\u010Dn\u00EDho n\u00E1stroje DiVinE a jeho aplikace."@cs . . . " methodology of software engineering" . . . "Techniky automatick\u00E9 verifikace a validace softwarov\u00FDch a hardwarov\u00FDch syst\u00E9m\u016F" . . "Parallel algorithms for key subtasks in automated verification (accepting cycle detection in directed graphs, decomposition into strongly connected components etc.). Development of parallel model-checker DiVinE and its applications."@en .