"2"^^ . "1ET400750408" . . . . "0"^^ . "2004-07-01+02:00"^^ . . "2008-12-31+01:00"^^ . . . . "Rapid prototyping tools for development of HW-accelerated embedded image- and video-processing applications"@en . . " embedded systems" . "http://www.isvav.cz/projectDetail.do?rowId=1ET400750408"^^ . "22"^^ . . . "The goal of the project is to set up tools enabling to speed-up design of systems using hardware acceleration of image and video processing algorithms, with the intention to facilitate industrial application of the advanced, computationally intensive algorithms in this field. Libraries of hardware and DSP macros of selected algorithms and their simulation equivalents will be developed in the project. A possibility to exploit dynamic FPGA reconfiguration for implementation of algorithms will be investigated - building on the results of the RECONF project, previously solved in the laboratory of proposer. An architecture of a multi-level environment for rapid application design and configuration, using these libraries, will also be examined. This environment, should, at the lower level, use relatively simple scripting language and, at the higher level, some rapid development tool. We assume the Matlab/Simulink environemnt and/or the high-level HW-oriented languages (HandelC, SystemC)."@en . "22"^^ . " hardware acceleration of image processing" . "Tools for rapid implementation of accelerated parallel image- and video processing algorithms using the Uni1P/DX64 platform were developed. Simulation and implementation libraries were developed, as well as configuration tools and design methodology."@en . "digital image and video processing; hardware acceleration of image processing; embedded systems; FPGA"@en . . "C\u00EDlem projektu je vytvo\u0159it n\u00E1stroje a prost\u0159edky, kter\u00E9 umo\u017En\u00ED urychlit n\u00E1vrh syst\u00E9m\u016F pou\u017E\u00EDvaj\u00EDc\u00EDch akceleraci algoritm\u016F pro zpracov\u00E1n\u00ED obrazu a videa, se z\u00E1m\u011Brem usnadnit pr\u016Fmyslovou aplikaci pokro\u010Dil\u00FDch, v\u00FDpo\u010Detn\u011B n\u00E1ro\u010Dn\u00FDch algoritm\u016F v t\u00E9to oblasti. V projektu budou vyvinuty knihovny hardwarov\u00FDch a DSP maker vybran\u00FDch algoritm\u016F a jejich simula\u010Dn\u00EDch ekvivalent\u016F. Budou zkoum\u00E1ny mo\u017Enosti vyu\u017Eit\u00ED dynamick\u00E9 rekonfigurace FPGA p\u0159i implementaci algoritm\u016F - zde nav\u00E1\u017Eeme na projekt RECONF, \u0159e\u0161en\u00FD pracovi\u0161t\u011Bm navrhovatele. P\u0159edm\u011Btem v\u00FDzkumu bude tak\u00E9 n\u00E1vrh architektury prost\u0159ed\u00ED pro rychl\u00FD v\u00FDvoj resp. konfiguraci aplikac\u00ED s vyu\u017Eit\u00EDm t\u011Bchto knihoven, v n\u011Bkolika \u00FArovn\u00EDch, od relativn\u011B jednoduch\u00E9ho skriptovac\u00EDho jazyku, a\u017E po vyu\u017Eit\u00ED prost\u0159edk\u016F pro rychl\u00FD v\u00FDvoj aplikac\u00ED. P\u0159edpokl\u00E1d\u00E1me vyu\u017Eit\u00ED prost\u0159ed\u00ED Matlab/Simulink a/nebo HW-orientovan\u00FDch jazyk\u016F vysok\u00E9 \u00FArovn\u011B (HandelC, SystemC)." . . . "digital image and video processing" . . "Byly vyvinuty prost\u0159edky pro rychlou implementaci akcelerovan\u00FDch paraleln\u00EDch algoritm\u016F zpracov\u00E1n\u00ED obrazu a videa na platform\u011B Uni1P/DX64. Byly navr\u017Eeny simula\u010Dn\u00ED a implementa\u010Dn\u00ED knihovny, konfigura\u010Dn\u00ED n\u00E1stroje a metodologie n\u00E1vrhu."@cs . "2008-02-21+01:00"^^ . . . . . "2009-05-04+02:00"^^ . "1"^^ . "Prost\u0159edky pro rychl\u00FD v\u00FDvoj HW-akcelerovan\u00FDch vestav\u011Bn\u00FDch aplikac\u00ED zpracov\u00E1n\u00ED obrazu a videa" . .