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Statements

Subject Item
n2:RIV%2F68407700%3A21240%2F14%3A00226138%21RIV15-MSM-21240___
rdf:type
n16:Vysledek skos:Concept
dcterms:description
This paper deals with an accurate time transfer and atomic clocks comparison in a geographically distant locations utilizing the optical lines. A new dual interpolating counter architecture for the clock comparison over an optical network is presented, especially utilizing dense wavelength division multiplexing (DWDM). There are described the time transfer method and the details of the interpolating counter implementation (the interpolator feed and the run time interpolator calibration). Experiences with the current embedded time interval counter design in the FPGA are presented as well. This paper deals with an accurate time transfer and atomic clocks comparison in a geographically distant locations utilizing the optical lines. A new dual interpolating counter architecture for the clock comparison over an optical network is presented, especially utilizing dense wavelength division multiplexing (DWDM). There are described the time transfer method and the details of the interpolating counter implementation (the interpolator feed and the run time interpolator calibration). Experiences with the current embedded time interval counter design in the FPGA are presented as well.
dcterms:title
Dual interpolating counter architecture for atomic clock comparison Dual interpolating counter architecture for atomic clock comparison
skos:prefLabel
Dual interpolating counter architecture for atomic clock comparison Dual interpolating counter architecture for atomic clock comparison
skos:notation
RIV/68407700:21240/14:00226138!RIV15-MSM-21240___
n4:aktivita
n21:I
n4:aktivity
I
n4:dodaniDat
n12:2015
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n17:D
n4:duvernostUdaju
n8:S
n4:entitaPredkladatele
n20:predkladatel
n4:idSjednocenehoVysledku
12467
n4:idVysledku
RIV/68407700:21240/14:00226138
n4:jazykVysledku
n14:eng
n4:klicovaSlova
measurement; precise time; frequency; FPGA; interpolating counter
n4:klicoveSlovo
n5:interpolating%20counter n5:FPGA n5:measurement n5:precise%20time n5:frequency
n4:kontrolniKodProRIV
[4BEEF9668FBF]
n4:mistoKonaniAkce
Kyjev
n4:mistoVydani
New York
n4:nazevZdroje
Proceedings of IEEE East-West Design & Test Symposium
n4:obor
n6:JC
n4:pocetDomacichTvurcuVysledku
1
n4:pocetTvurcuVysledku
2
n4:rokUplatneniVysledku
n12:2014
n4:tvurceVysledku
Smotlacha, Vladimír Dostál, Jiří
n4:typAkce
n15:WRD
n4:zahajeniAkce
2014-09-26+02:00
s:numberOfPages
4
n18:doi
10.1109/EWDTS.2014.7027081
n10:hasPublisher
Institute of Electrical and Electronics Engineers
n19:isbn
978-1-4799-7630-0
n9:organizacniJednotka
21240