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Statements

Subject Item
n2:RIV%2F68407700%3A21230%2F13%3A00207530%21RIV14-MSM-21230___
rdf:type
skos:Concept n12:Vysledek
dcterms:description
The aim of this paper is to describe the implementation of a two-channel filter bank (FB) using the switched capacitor (SC) technique. The implementation of two-channel filter bank using an IIR Cauer filter, conversion of IIR into the SC filters and the final implementation of the SC filters is described. The whole filter bank was realized on a printed board and the magnitude frequency response was measured for different timing of clock signals. Resulting magnitude frequency response is given. Measured responses are compared with simulated ones. The aim of this paper is to describe the implementation of a two-channel filter bank (FB) using the switched capacitor (SC) technique. The implementation of two-channel filter bank using an IIR Cauer filter, conversion of IIR into the SC filters and the final implementation of the SC filters is described. The whole filter bank was realized on a printed board and the magnitude frequency response was measured for different timing of clock signals. Resulting magnitude frequency response is given. Measured responses are compared with simulated ones.
dcterms:title
Switched Capacitor Circuit Implementation of Two-Channel Filter Bank Switched Capacitor Circuit Implementation of Two-Channel Filter Bank
skos:prefLabel
Switched Capacitor Circuit Implementation of Two-Channel Filter Bank Switched Capacitor Circuit Implementation of Two-Channel Filter Bank
skos:notation
RIV/68407700:21230/13:00207530!RIV14-MSM-21230___
n12:predkladatel
n13:orjk%3A21230
n3:aktivita
n14:S
n3:aktivity
S
n3:dodaniDat
n6:2014
n3:domaciTvurceVysledku
n18:5896010 n18:8617694 n18:4497783
n3:druhVysledku
n7:D
n3:duvernostUdaju
n19:S
n3:entitaPredkladatele
n4:predkladatel
n3:idSjednocenehoVysledku
109333
n3:idVysledku
RIV/68407700:21230/13:00207530
n3:jazykVysledku
n9:eng
n3:klicovaSlova
filter bank implementation; SC circuit; filter synthesis
n3:klicoveSlovo
n16:SC%20circuit n16:filter%20bank%20implementation n16:filter%20synthesis
n3:kontrolniKodProRIV
[0ADC962453F2]
n3:mistoKonaniAkce
Plzeň
n3:mistoVydani
Pilsen
n3:nazevZdroje
18th 2013 International Conference on Applied Electronics
n3:obor
n11:JA
n3:pocetDomacichTvurcuVysledku
3
n3:pocetTvurcuVysledku
4
n3:rokUplatneniVysledku
n6:2013
n3:tvurceVysledku
Hospodka, Jiří Náhlík, Jiří Sovka, Pavel Psenicka, B.
n3:typAkce
n20:EUR
n3:zahajeniAkce
2013-09-10+02:00
s:issn
1803-7232
s:numberOfPages
4
n21:hasPublisher
Západočeská univerzita v Plzni
n10:isbn
978-80-261-0166-6
n15:organizacniJednotka
21230