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Statements

Subject Item
n2:RIV%2F68407700%3A21230%2F05%3A03108031%21RIV06-GA0-21230___
rdf:type
skos:Concept n14:Vysledek
dcterms:description
Není k dispozici We present a method allowing us to determine the grouping of the outputs of the multi output Boolean logic function for a single-level partitioning and minimization. Some kind of decomposition is often needed during the synthesis of logic circuits and the subsequent mapping onto technology. Sometimes a circuit has to be divided into several stand-alone parts, among its outputs, or possibly its inputs. It could be a case of a design targeted into PLAs, GALs, or any other monolithic components having a limited number of inputs and/or outputs. We propose a methodology to determine the way how the original circuit has to be partitioned into several parts of an arbitrary size, in order to reduce the complexity of the individual parts. The method is based on our FC-Min minimizer, even when no Boolean minimization has to be involved here. The efficiency of the method is demonstrated on the standard MCNC benchmarks. We present a method allowing us to determine the grouping of the outputs of the multi output Boolean logic function for a single-level partitioning and minimization. Some kind of decomposition is often needed during the synthesis of logic circuits and the subsequent mapping onto technology. Sometimes a circuit has to be divided into several stand-alone parts, among its outputs, or possibly its inputs. It could be a case of a design targeted into PLAs, GALs, or any other monolithic components having a limited number of inputs and/or outputs. We propose a methodology to determine the way how the original circuit has to be partitioned into several parts of an arbitrary size, in order to reduce the complexity of the individual parts. The method is based on our FC-Min minimizer, even when no Boolean minimization has to be involved here. The efficiency of the method is demonstrated on the standard MCNC benchmarks.
dcterms:title
Output Grouping-Based Decomposition of Logic Functions Output Grouping-Based Decomposition of Logic Functions Není k dispozici
skos:prefLabel
Není k dispozici Output Grouping-Based Decomposition of Logic Functions Output Grouping-Based Decomposition of Logic Functions
skos:notation
RIV/68407700:21230/05:03108031!RIV06-GA0-21230___
n3:strany
137 ; 144
n3:aktivita
n11:P n11:Z
n3:aktivity
P(GA102/04/2137), Z(MSM6840770014)
n3:dodaniDat
n15:2006
n3:domaciTvurceVysledku
n5:7140827 n5:2194937
n3:druhVysledku
n20:D
n3:duvernostUdaju
n13:S
n3:entitaPredkladatele
n19:predkladatel
n3:idSjednocenehoVysledku
535170
n3:idVysledku
RIV/68407700:21230/05:03108031
n3:jazykVysledku
n4:eng
n3:klicovaSlova
decomposistion, logical function, partitioning, minimization
n3:klicoveSlovo
n7:logical%20function n7:partitioning n7:minimization n7:decomposistion
n3:kontrolniKodProRIV
[E07994EFE137]
n3:mistoKonaniAkce
Sopron
n3:mistoVydani
Sopron
n3:nazevZdroje
Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
n3:obor
n16:JC
n3:pocetDomacichTvurcuVysledku
2
n3:pocetTvurcuVysledku
2
n3:projekt
n10:GA102%2F04%2F2137
n3:rokUplatneniVysledku
n15:2005
n3:tvurceVysledku
Kubátová, Hana Fišer, Petr
n3:typAkce
n12:WRD
n3:zahajeniAkce
2005-04-13+02:00
n3:zamer
n18:MSM6840770014
s:numberOfPages
8
n17:hasPublisher
University of Western Hungary
n22:isbn
963-9364-48-7
n8:organizacniJednotka
21230