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Statements

Subject Item
n2:RIV%2F67985556%3A_____%2F13%3A00380863%21RIV13-MSM-67985556
rdf:type
n11:Vysledek skos:Concept
dcterms:description
This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs. * Describes and documents a working SPARC v8, with fine-grain multithreading and fast context switch; * Provides VHDL sources for the described processor; * Describes a latency-tolerant framework for coupling hardware accelerators to microthreaded processor pipelines; * Includes programming by example in the micro-threaded assembly language. This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs. * Describes and documents a working SPARC v8, with fine-grain multithreading and fast context switch; * Provides VHDL sources for the described processor; * Describes a latency-tolerant framework for coupling hardware accelerators to microthreaded processor pipelines; * Includes programming by example in the micro-threaded assembly language.
dcterms:title
UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
skos:prefLabel
UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
skos:notation
RIV/67985556:_____/13:00380863!RIV13-MSM-67985556
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n4:aktivity
P(7E08013)
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n14:2013
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n4:duvernostUdaju
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n4:entitaPredkladatele
n21:predkladatel
n4:idSjednocenehoVysledku
113325
n4:idVysledku
RIV/67985556:_____/13:00380863
n4:jazykVysledku
n19:eng
n4:klicovaSlova
multi-threading; micro-threading; SPARC; LEON3; hardware acceleration; FPGA; GRLIB
n4:klicoveSlovo
n9:SPARC n9:FPGA n9:LEON3 n9:micro-threading n9:multi-threading n9:hardware%20acceleration n9:GRLIB
n4:kontrolniKodProRIV
[A71B1A4C5AA3]
n4:mistoVydani
New York
n4:nazevEdiceCisloSvazku
Circuits & Systems
n4:nazevZdroje
UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
n4:obor
n20:JC
n4:pocetDomacichTvurcuVysledku
5
n4:pocetStranKnihy
209
n4:pocetTvurcuVysledku
5
n4:projekt
n5:7E08013
n4:rokUplatneniVysledku
n14:2013
n4:tvurceVysledku
Kafka, Leoš Daněk, Martin Sýkora, Jaroslav Kohout, Lukáš Bartosinski, Roman
s:numberOfPages
209
n16:doi
10.1007/978-1-4614-2410-9
n13:hasPublisher
Springer-Verlag
n17:isbn
978-1-4614-2409-3