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Statements

Subject Item
n2:RIV%2F67985556%3A_____%2F11%3A00360749%21RIV12-AV0-67985556
rdf:type
n7:Vysledek skos:Concept
dcterms:description
SMECY project is an ambitious European initiative involving 29 partners across 9 countries to enable Europe to have a leader role in multi-core domain by developing new programming technologies enabling the exploitation of architectures offering hundreds of cores. Multi-core technologies will rapidly provide to the parallel computing field improved performance, energy saving and cost reduction and will become of strategic value in winning market share in all areas of embedded systems. Given the need, SMECY lays the focus on targeting programming multi-core architecture for consumer electronics with efficient resources management. The first presentation describes the overall project while the two others are respectively dedicated to the multi-core platforms targeted in the project and the description of the tools constituting the bricks of the tool chains. SMECY project is an ambitious European initiative involving 29 partners across 9 countries to enable Europe to have a leader role in multi-core domain by developing new programming technologies enabling the exploitation of architectures offering hundreds of cores. Multi-core technologies will rapidly provide to the parallel computing field improved performance, energy saving and cost reduction and will become of strategic value in winning market share in all areas of embedded systems. Given the need, SMECY lays the focus on targeting programming multi-core architecture for consumer electronics with efficient resources management. The first presentation describes the overall project while the two others are respectively dedicated to the multi-core platforms targeted in the project and the description of the tools constituting the bricks of the tool chains.
dcterms:title
SMECY: Smarti Multi-core Embedded SYstems (Special Session) SMECY: Smarti Multi-core Embedded SYstems (Special Session)
skos:prefLabel
SMECY: Smarti Multi-core Embedded SYstems (Special Session) SMECY: Smarti Multi-core Embedded SYstems (Special Session)
skos:notation
RIV/67985556:_____/11:00360749!RIV12-AV0-67985556
n7:predkladatel
n8:ico%3A67985556
n5:aktivita
n18:P n18:Z
n5:aktivity
P(7H10001), Z(AV0Z10750506)
n5:dodaniDat
n6:2012
n5:domaciTvurceVysledku
n13:4270320
n5:druhVysledku
n12:D
n5:duvernostUdaju
n21:S
n5:entitaPredkladatele
n17:predkladatel
n5:idSjednocenehoVysledku
230003
n5:idVysledku
RIV/67985556:_____/11:00360749
n5:jazykVysledku
n14:eng
n5:klicovaSlova
embedded systems; multi-core systems
n5:klicoveSlovo
n16:embedded%20systems n16:multi-core%20systems
n5:kontrolniKodProRIV
[F0EC88652B86]
n5:mistoKonaniAkce
Lausanne
n5:mistoVydani
Lausanne
n5:nazevZdroje
Proceedings of 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011
n5:obor
n20:JC
n5:pocetDomacichTvurcuVysledku
1
n5:pocetTvurcuVysledku
4
n5:projekt
n19:7H10001
n5:rokUplatneniVysledku
n6:2011
n5:tvurceVysledku
Pacull, F. Urlini, G. Bertels, K. Daněk, Martin
n5:typAkce
n9:WRD
n5:zahajeniAkce
2011-05-02+02:00
n5:zamer
n10:AV0Z10750506
s:numberOfPages
2
n3:hasPublisher
ACM Press
n15:isbn
978-1-4503-0667-6