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Statements

Subject Item
n2:RIV%2F67985556%3A_____%2F09%3A00331484%21RIV10-MSM-67985556
rdf:type
skos:Concept n16:Vysledek
dcterms:description
This application note describes HW demonstrator of three floating point accelerators bce_fp01_1x1_0_plbw_v1_|10|20|30|_a. Accelerators are reconfigurable by change of firmware. Accelerators are compatible with PLB_v46 bus of Xilinx MicroBlaze soft-core processor on Spartan 3an FPGA. Demonstrator supports Ethernet point-to point connectivity and boot from on board parallel FLASH. A nonvolatile internal FLASH of the XC3S700AN-4FGG484C FPGA is used for the power-up initialization of the FPGA chip located on the Xilinx Spartan-3AN starter kit. This application note describes HW demonstrator of three floating point accelerators bce_fp01_1x1_0_plbw_v1_|10|20|30|_a. Accelerators are reconfigurable by change of firmware. Accelerators are compatible with PLB_v46 bus of Xilinx MicroBlaze soft-core processor on Spartan 3an FPGA. Demonstrator supports Ethernet point-to point connectivity and boot from on board parallel FLASH. A nonvolatile internal FLASH of the XC3S700AN-4FGG484C FPGA is used for the power-up initialization of the FPGA chip located on the Xilinx Spartan-3AN starter kit.
dcterms:title
Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final
skos:prefLabel
Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final
skos:notation
RIV/67985556:_____/09:00331484!RIV10-MSM-67985556
n3:aktivita
n14:Z n14:P
n3:aktivity
P(1M0567), P(2C06008), Z(AV0Z10750506)
n3:dodaniDat
n9:2010
n3:domaciTvurceVysledku
n18:6386784
n3:druhVysledku
n11:G%2FB
n3:duvernostUdaju
n17:S
n3:ekonomickeParametry
Lokalizace vestaveného uCLinux operačního systému petalinux-v.40-final spoku s akceleratorem výpočtů v plovoucí řádové čárce na FPGA 3S700AN s cenou čipu pod 800 Kč/kus
n3:entitaPredkladatele
n19:predkladatel
n3:idSjednocenehoVysledku
309421
n3:idVysledku
RIV/67985556:_____/09:00331484
n3:interniIdentifikace
bce_fp01_1x1_0_plbw...
n3:jazykVysledku
n4:eng
n3:kategorie
n10:A
n3:klicovaSlova
Nonvolatile Field Programable Gate Array; Embedded uCLinux; Floating point accelerator
n3:klicoveSlovo
n5:Floating%20point%20accelerator n5:Embedded%20uCLinux n5:Nonvolatile%20Field%20Programable%20Gate%20Array
n3:kontrolniKodProRIV
[1206E81FFAD5]
n3:licencniPoplatek
n15:A
n3:lokalizaceVysledku
UTIA AV ČR, oddělení zpracování signálů, Praha 8
n3:obor
n7:JC
n3:pocetDomacichTvurcuVysledku
1
n3:pocetTvurcuVysledku
1
n3:projekt
n13:1M0567 n13:2C06008
n3:rokUplatneniVysledku
n9:2009
n3:technickeParametry
Výpočet LMS Filtru 50MFLOPS při spotřebě 5mW/MFLOPS
n3:tvurceVysledku
Kadlec, Jiří
n3:vlastnik
n19:vlastnikVysledku
n3:vyuzitiJinymSubjektem
n12:A
n3:zamer
n20:AV0Z10750506