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Statements

Subject Item
n2:RIV%2F67985556%3A_____%2F07%3A00085964%21RIV10-MSM-67985556
rdf:type
n7:Vysledek skos:Concept
dcterms:description
The MicroBlaze processor serves in many FPGA designs as the central 32 bit CPU with access to the global off chip memory and peripherals. MicroBlaze provides FSL links for up to 8 coprocessors. We present two MicroBlaze designs. The first design works with 8 PicoBlaze-based accelerators for pipelined, single-precision floating point vector-oriented operations, and delivers over 1.2 GFLOPs. The second design uses 4 similar double precision accelerators and delivers 600 MFLOPs. The acceleration results are documented on batch computation of a finite impulse response filter. Each PicoBlaze soft core can be re-programmed by MicroBlaze. This provides a framework for a partial dynamic change of the functionality of accelerators. This program change can be done via the FSL link in parallel with the current computation of the accelerator. The MicroBlaze processor serves in many FPGA designs as the central 32 bit CPU with access to the global off chip memory and peripherals. MicroBlaze provides FSL links for up to 8 coprocessors. We present two MicroBlaze designs. The first design works with 8 PicoBlaze-based accelerators for pipelined, single-precision floating point vector-oriented operations, and delivers over 1.2 GFLOPs. The second design uses 4 similar double precision accelerators and delivers 600 MFLOPs. The acceleration results are documented on batch computation of a finite impulse response filter. Each PicoBlaze soft core can be re-programmed by MicroBlaze. This provides a framework for a partial dynamic change of the functionality of accelerators. This program change can be done via the FSL link in parallel with the current computation of the accelerator.
dcterms:title
Accelerating MicroBlaze Floating Point Operations Accelerating MicroBlaze Floating Point Operations
skos:prefLabel
Accelerating MicroBlaze Floating Point Operations Accelerating MicroBlaze Floating Point Operations
skos:notation
RIV/67985556:_____/07:00085964!RIV10-MSM-67985556
n3:aktivita
n13:Z n13:P
n3:aktivity
P(1ET400750406), P(1M0567), Z(AV0Z10750506)
n3:dodaniDat
n14:2010
n3:domaciTvurceVysledku
n6:6719791 n6:4270320 n6:6386784
n3:druhVysledku
n21:D
n3:duvernostUdaju
n15:S
n3:entitaPredkladatele
n19:predkladatel
n3:idSjednocenehoVysledku
408355
n3:idVysledku
RIV/67985556:_____/07:00085964
n3:jazykVysledku
n20:eng
n3:klicovaSlova
acceleration; floating point operation; coprocessor; MicroBlaze
n3:klicoveSlovo
n4:floating%20point%20operation n4:coprocessor n4:acceleration n4:MicroBlaze
n3:kontrolniKodProRIV
[1F14A443ED61]
n3:mistoKonaniAkce
Amsterdam
n3:mistoVydani
Delft
n3:nazevZdroje
Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL)
n3:obor
n16:JC
n3:pocetDomacichTvurcuVysledku
3
n3:pocetTvurcuVysledku
3
n3:projekt
n5:1ET400750406 n5:1M0567
n3:rokUplatneniVysledku
n14:2007
n3:tvurceVysledku
Kadlec, Jiří Bartosinski, Roman Daněk, Martin
n3:typAkce
n9:WRD
n3:zahajeniAkce
2007-08-27+02:00
n3:zamer
n18:AV0Z10750506
s:numberOfPages
4
n11:hasPublisher
IEEE
n17:isbn
978-1-4244-1059-0