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Statements

Subject Item
n2:RIV%2F67985556%3A_____%2F04%3A00106234%21RIV%2F2005%2FGA0%2FA16005%2FN
rdf:type
skos:Concept n14:Vysledek
dcterms:description
This paper presents an universal reconfigurable SOPC platform based on a combination of the Atmel AT94K FPSLIC device and an external memory. The presented platform increases the power of the FPSLIC device both by extending the internal address space through an introduction of a virtual program memory and by providing a transparent infrastructure for FPGA reconfiguration. The platform is demonstrated on two simple designs that demonstrate both aspects. Tento článek prezentuje univerzální rekonfigurovatelnou SOPC platformu postavenou na kombinaci čipu Atmel AT94K FPSLIC a externí paměti. Prezentovaná platforma rozšiřuje možnosti zařízení FPSLIC pomocí zvětšení interního adresního prostoru využitím virtuální programové paměti a vytvořením transparentní infrastruktury pro rekonfiguraci FPGA obvodů. Platforma je demonstrována na dvou jednoduchých příkladech This paper presents an universal reconfigurable SOPC platform based on a combination of the Atmel AT94K FPSLIC device and an external memory. The presented platform increases the power of the FPSLIC device both by extending the internal address space through an introduction of a virtual program memory and by providing a transparent infrastructure for FPGA reconfiguration. The platform is demonstrated on two simple designs that demonstrate both aspects.
dcterms:title
Reconfigurable system-on-a-programmable-chip platform Rekonfigurovatelná SOPC platforma Reconfigurable system-on-a-programmable-chip platform
skos:prefLabel
Reconfigurable system-on-a-programmable-chip platform Rekonfigurovatelná SOPC platforma Reconfigurable system-on-a-programmable-chip platform
skos:notation
RIV/67985556:_____/04:00106234!RIV/2005/GA0/A16005/N
n4:strany
21;28
n4:aktivita
n10:Z n10:P
n4:aktivity
P(GA102/04/2137), Z(AV0Z1075907)
n4:dodaniDat
n8:2005
n4:domaciTvurceVysledku
n5:3752070 n5:4270320 n5:8143404 n5:4726731 n5:6386784
n4:druhVysledku
n18:D
n4:duvernostUdaju
n6:S
n4:entitaPredkladatele
n13:predkladatel
n4:idSjednocenehoVysledku
583830
n4:idVysledku
RIV/67985556:_____/04:00106234
n4:jazykVysledku
n17:eng
n4:klicovaSlova
reconfigurable hardware;system-on-chip;methodology
n4:klicoveSlovo
n11:methodology n11:system-on-chip n11:reconfigurable%20hardware
n4:kontrolniKodProRIV
[F52FCBAFEB46]
n4:mistoKonaniAkce
Stará Lesná
n4:mistoVydani
Bratislava
n4:nazevZdroje
Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
n4:obor
n12:JC
n4:pocetDomacichTvurcuVysledku
5
n4:pocetTvurcuVysledku
5
n4:projekt
n19:GA102%2F04%2F2137
n4:rokUplatneniVysledku
n8:2004
n4:tvurceVysledku
Matoušek, Rudolf Kadlec, Jiří Pohl, Zdeněk Honzík, Petr Daněk, Martin
n4:typAkce
n20:WRD
n4:zahajeniAkce
2004-04-18+02:00
n4:zamer
n16:AV0Z1075907
s:numberOfPages
8
n9:hasPublisher
Ústav informatiky SAV
n21:isbn
80-969117-9-1