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Statements

Subject Item
n2:RIV%2F67985556%3A_____%2F03%3A16030110%21RIV%2F2004%2FAV0%2FA16004%2FN
rdf:type
skos:Concept n17:Vysledek
dcterms:description
In this paper we describe an implementation of the Given rotations using the High speed logarithmic arithmetic (HSLA) library. This library is used for an efficient implementation of the floating-point arithmetic operation in FPGA (including the square root operation). The library was used to implement Given rotations in the Xilinx XCV2000E. The implementation was realised using some rapid prototyping tools for signal processing applications and for the FPGA design. In this paper we describe an implementation of the Given rotations using the High speed logarithmic arithmetic (HSLA) library. This library is used for an efficient implementation of the floating-point arithmetic operation in FPGA (including the square root operation). The library was used to implement Given rotations in the Xilinx XCV2000E. The implementation was realised using some rapid prototyping tools for signal processing applications and for the FPGA design.
dcterms:title
Using logarithmic arithmetic for FPGA implementation of the Givens rotations. Using logarithmic arithmetic for FPGA implementation of the Givens rotations.
skos:prefLabel
Using logarithmic arithmetic for FPGA implementation of the Givens rotations. Using logarithmic arithmetic for FPGA implementation of the Givens rotations.
skos:notation
RIV/67985556:_____/03:16030110!RIV/2004/AV0/A16004/N
n4:strany
199;204
n4:aktivita
n10:Z n10:P
n4:aktivity
P(LN00B096), Z(AV0Z1075907)
n4:dodaniDat
n11:2004
n4:domaciTvurceVysledku
n19:6386784 n19:2365030
n4:druhVysledku
n18:D
n4:duvernostUdaju
n8:S
n4:entitaPredkladatele
n12:predkladatel
n4:idSjednocenehoVysledku
632380
n4:idVysledku
RIV/67985556:_____/03:16030110
n4:jazykVysledku
n20:eng
n4:klicovaSlova
FPGA; logarithmic arithmetic; Givens rotations
n4:klicoveSlovo
n7:Givens%20rotations n7:FPGA n7:logarithmic%20arithmetic
n4:kontrolniKodProRIV
[E4446FB719BF]
n4:mistoKonaniAkce
Baiona [ES]
n4:mistoVydani
Vigo
n4:nazevZdroje
Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications.
n4:obor
n5:JC
n4:pocetDomacichTvurcuVysledku
2
n4:pocetTvurcuVysledku
2
n4:pocetUcastnikuAkce
0
n4:pocetZahranicnichUcastnikuAkce
0
n4:projekt
n21:LN00B096
n4:rokUplatneniVysledku
n11:2003
n4:tvurceVysledku
Schier, Jan Kadlec, Jiří
n4:typAkce
n13:WRD
n4:zahajeniAkce
2003-09-08+02:00
n4:zamer
n6:AV0Z1075907
s:numberOfPages
6
n9:hasPublisher
Universidade de Vigo
n15:isbn
84-8158-248-4