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Statements

Subject Item
n2:RIV%2F67985556%3A_____%2F01%3A16010114%21RIV%2F2003%2FAV0%2FA16003%2FN
rdf:type
n7:Vysledek skos:Concept
dcterms:description
Implementation of floatig point in FPGA (Field Programmable Gate Arrays) is not easy. Paper presents FPGA core which implements these operations by representation of floating point numbers as 32-bit integer (fixed point) logarithm. Basic arithmetical operations are performed in the logarithm numbering system (LNS) suitable for FPGA. First, we describe Matlab library emulating bit-exactly the properties of the final hardware. Implementation of floatig point in FPGA (Field Programmable Gate Arrays) is not easy. Paper presents FPGA core which implements these operations by representation of floating point numbers as 32-bit integer (fixed point) logarithm. Basic arithmetical operations are performed in the logarithm numbering system (LNS) suitable for FPGA. First, we describe Matlab library emulating bit-exactly the properties of the final hardware.
dcterms:title
FPGA implementation of logarithmic unit core. FPGA implementation of logarithmic unit core.
skos:prefLabel
FPGA implementation of logarithmic unit core. FPGA implementation of logarithmic unit core.
skos:notation
RIV/67985556:_____/01:16010114!RIV/2003/AV0/A16003/N
n4:strany
547;554
n4:aktivita
n19:Z
n4:aktivity
Z(AV0Z1075907)
n4:dodaniDat
n8:2003
n4:domaciTvurceVysledku
n6:3752070 n6:6386784 n6:7764480
n4:druhVysledku
n9:D
n4:duvernostUdaju
n14:S
n4:entitaPredkladatele
n12:predkladatel
n4:idSjednocenehoVysledku
680693
n4:idVysledku
RIV/67985556:_____/01:16010114
n4:jazykVysledku
n10:eng
n4:klicovaSlova
field programmable gate array
n4:klicoveSlovo
n17:field%20programmable%20gate%20array
n4:kontrolniKodProRIV
[D4BF79E71E58]
n4:mistoKonaniAkce
Nürnberg [DE]
n4:mistoVydani
Nürnberg
n4:nazevZdroje
Embedded Intelligence 2001.
n4:obor
n16:JC
n4:pocetDomacichTvurcuVysledku
3
n4:pocetTvurcuVysledku
3
n4:pocetUcastnikuAkce
0
n4:pocetZahranicnichUcastnikuAkce
0
n4:rokUplatneniVysledku
n8:2001
n4:tvurceVysledku
Matoušek, Rudolf Kadlec, Jiří Líčko, Miroslav
n4:typAkce
n5:WRD
n4:zahajeniAkce
2001-02-14+01:00
n4:zamer
n18:AV0Z1075907
s:numberOfPages
8
n15:hasPublisher
Design & Elektronik