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Namespace Prefixes

PrefixIRI
n15http://linked.opendata.cz/ontology/domain/vavai/riv/typAkce/
dctermshttp://purl.org/dc/terms/
n19http://purl.org/net/nknouf/ns/bibtex#
n16http://linked.opendata.cz/resource/domain/vavai/projekt/
n12http://linked.opendata.cz/resource/domain/vavai/riv/tvurce/
n11http://linked.opendata.cz/resource/domain/vavai/vysledek/RIV%2F63839172%3A_____%2F12%3A00007356%21RIV13-MSM-63839172/
n6http://linked.opendata.cz/resource/domain/vavai/subjekt/
n5http://linked.opendata.cz/ontology/domain/vavai/
n10https://schema.org/
shttp://schema.org/
skoshttp://www.w3.org/2004/02/skos/core#
n3http://linked.opendata.cz/ontology/domain/vavai/riv/
n2http://linked.opendata.cz/resource/domain/vavai/vysledek/
rdfhttp://www.w3.org/1999/02/22-rdf-syntax-ns#
n4http://linked.opendata.cz/ontology/domain/vavai/riv/klicoveSlovo/
n18http://linked.opendata.cz/ontology/domain/vavai/riv/duvernostUdaju/
xsdhhttp://www.w3.org/2001/XMLSchema#
n21http://linked.opendata.cz/ontology/domain/vavai/riv/jazykVysledku/
n13http://linked.opendata.cz/ontology/domain/vavai/riv/aktivita/
n14http://linked.opendata.cz/ontology/domain/vavai/riv/obor/
n8http://linked.opendata.cz/ontology/domain/vavai/riv/druhVysledku/
n17http://reference.data.gov.uk/id/gregorian-year/

Statements

Subject Item
n2:RIV%2F63839172%3A_____%2F12%3A00007356%21RIV13-MSM-63839172
rdf:type
n5:Vysledek skos:Concept
dcterms:description
Many packet classification algorithms were proposed to deal with the rapidly growing speed of computer networks. Unfortunately all of these algorithms are able to achieve high throughput only at the cost of excessively large memory and can be used only for small sets of rules. We propose new algorithm that uses four techniques to lower the memory requirements: division of rule set into subsets,removal of critical rules,prefix coloring and perfect hashing. The algorithm is designed for pipelined hardware implementation,can achieve the throughput of 266 million packets per second,which corresponds to 178 Gb/s for the shortest 64B packets,and outperforms older approaches in terms of memory requirements by 66 % in average for the rule sets available to us. Many packet classification algorithms were proposed to deal with the rapidly growing speed of computer networks. Unfortunately all of these algorithms are able to achieve high throughput only at the cost of excessively large memory and can be used only for small sets of rules. We propose new algorithm that uses four techniques to lower the memory requirements: division of rule set into subsets,removal of critical rules,prefix coloring and perfect hashing. The algorithm is designed for pipelined hardware implementation,can achieve the throughput of 266 million packets per second,which corresponds to 178 Gb/s for the shortest 64B packets,and outperforms older approaches in terms of memory requirements by 66 % in average for the rule sets available to us.
dcterms:title
Reducing memory in high-speed packet classification Reducing memory in high-speed packet classification
skos:prefLabel
Reducing memory in high-speed packet classification Reducing memory in high-speed packet classification
skos:notation
RIV/63839172:_____/12:00007356!RIV13-MSM-63839172
n5:predkladatel
n6:ico%3A63839172
n3:aktivita
n13:P
n3:aktivity
P(LM2010005)
n3:dodaniDat
n17:2013
n3:domaciTvurceVysledku
n12:9452591 n12:6647596
n3:druhVysledku
n8:D
n3:duvernostUdaju
n18:S
n3:entitaPredkladatele
n11:predkladatel
n3:idSjednocenehoVysledku
164485
n3:idVysledku
RIV/63839172:_____/12:00007356
n3:jazykVysledku
n21:eng
n3:klicovaSlova
classification; parallelism; hardware; SRAM; FPGA
n3:klicoveSlovo
n4:hardware n4:classification n4:SRAM n4:parallelism n4:FPGA
n3:kontrolniKodProRIV
[F1D77E4770BD]
n3:mistoKonaniAkce
Limassol, Kypr
n3:mistoVydani
Limassol
n3:nazevZdroje
Proceedings of the 8th International Wireless Communications and Mobile Computing Conference
n3:obor
n14:IN
n3:pocetDomacichTvurcuVysledku
2
n3:pocetTvurcuVysledku
2
n3:projekt
n16:LM2010005
n3:rokUplatneniVysledku
n17:2012
n3:tvurceVysledku
Kořenek, Jan Puš, Viktor
n3:typAkce
n15:WRD
n3:wos
000312146500072
n3:zahajeniAkce
2012-08-27+02:00
s:numberOfPages
6
n19:hasPublisher
Institute of Electrical and Electronics Engineers ( IEEE )
n10:isbn
978-1-4577-1379-8