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Statements

Subject Item
n2:RIV%2F49777513%3A23220%2F13%3A43920056%21RIV14-MSM-23220___
rdf:type
n8:Vysledek skos:Concept
dcterms:description
This paper is introducing tools and techniques for verification of complex HW/SW applications with high degree of parallelism. Strength and weakness of each approach is discussed. Example of straightforward LTS verification process is given with help PAT software This paper is introducing tools and techniques for verification of complex HW/SW applications with high degree of parallelism. Strength and weakness of each approach is discussed. Example of straightforward LTS verification process is given with help PAT software This paper is introducing tools and techniques for verification of complex HW/SW applications with high degree of parallelism. Strength and weakness of each approach is discussed. Example of straightforward LTS verification process is given with help PAT software
dcterms:title
Verifikační nástroje aplikace PAT Verifikační nástroje aplikace PAT PAT verification tools
skos:prefLabel
PAT verification tools Verifikační nástroje aplikace PAT Verifikační nástroje aplikace PAT
skos:notation
RIV/49777513:23220/13:43920056!RIV14-MSM-23220___
n8:predkladatel
n9:orjk%3A23220
n5:aktivita
n12:S
n5:aktivity
S
n5:dodaniDat
n14:2014
n5:domaciTvurceVysledku
n15:5400317
n5:druhVysledku
n10:O
n5:duvernostUdaju
n16:S
n5:entitaPredkladatele
n7:predkladatel
n5:idSjednocenehoVysledku
113929
n5:idVysledku
RIV/49777513:23220/13:43920056
n5:jazykVysledku
n17:cze
n5:klicovaSlova
Model checking, verification, CSP, LTS, RTS, LTL, assertions, PAT
n5:klicoveSlovo
n11:LTS n11:LTL n11:assertions n11:verification n11:RTS n11:Model%20checking n11:PAT n11:CSP
n5:kontrolniKodProRIV
[3D4FCF3CA301]
n5:obor
n13:JE
n5:pocetDomacichTvurcuVysledku
1
n5:pocetTvurcuVysledku
1
n5:rokUplatneniVysledku
n14:2013
n5:tvurceVysledku
Piterka, Luboš
n6:organizacniJednotka
23220