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Statements

Subject Item
n2:RIV%2F49777513%3A23220%2F13%3A43918998%21RIV14-TA0-23220___
rdf:type
n6:Vysledek skos:Concept
dcterms:description
This paper investigates two control platforms combining DSP and FPGA. The first platform is topologically designed as two boards and the second one as a single board. The proposed units are designed to control multilevel converters particularly. Both developed platforms are used in control system for a four level multilevel converter with flying capacitors and their behavior is investigated and evaluated by selected experiments on a converter laboratory prototype with rated power of 30 kVA. This paper investigates two control platforms combining DSP and FPGA. The first platform is topologically designed as two boards and the second one as a single board. The proposed units are designed to control multilevel converters particularly. Both developed platforms are used in control system for a four level multilevel converter with flying capacitors and their behavior is investigated and evaluated by selected experiments on a converter laboratory prototype with rated power of 30 kVA.
dcterms:title
Comparison of control solutions for control of four-level converter with flying capacitors Comparison of control solutions for control of four-level converter with flying capacitors
skos:prefLabel
Comparison of control solutions for control of four-level converter with flying capacitors Comparison of control solutions for control of four-level converter with flying capacitors
skos:notation
RIV/49777513:23220/13:43918998!RIV14-TA0-23220___
n6:predkladatel
n7:orjk%3A23220
n4:aktivita
n5:P n5:S
n4:aktivity
P(TA01010863), S
n4:dodaniDat
n8:2014
n4:domaciTvurceVysledku
n13:2564904 n13:7795661 n13:6823033 n13:1754289
n4:druhVysledku
n11:D
n4:duvernostUdaju
n20:S
n4:entitaPredkladatele
n10:predkladatel
n4:idSjednocenehoVysledku
66166
n4:idVysledku
RIV/49777513:23220/13:43918998
n4:jazykVysledku
n15:eng
n4:klicovaSlova
FPGA; DSP; Control; Multilevel Converter; Balance table
n4:klicoveSlovo
n12:Multilevel%20Converter n12:Balance%20table n12:Control n12:DSP n12:FPGA
n4:kontrolniKodProRIV
[F770855B7EFC]
n4:mistoKonaniAkce
Plzeň
n4:mistoVydani
Pilsen
n4:nazevZdroje
2013 International Conference on Applied Electronics
n4:obor
n18:JA
n4:pocetDomacichTvurcuVysledku
4
n4:pocetTvurcuVysledku
4
n4:projekt
n17:TA01010863
n4:rokUplatneniVysledku
n8:2013
n4:tvurceVysledku
Glasberger, Tomáš Peroutka, Zdeněk Janík, Dušan Košan, Tomáš
n4:typAkce
n9:WRD
n4:zahajeniAkce
2013-09-10+02:00
s:issn
1803-7232
s:numberOfPages
4
n22:hasPublisher
Západočeská univerzita v Plzni
n21:isbn
978-80-261-0166-6
n19:organizacniJednotka
23220